SPEC Seal of Reviewal OMPM2001 Result
Copyright © 1999-2002 Standard Performance Evaluation Corporation
Hewlett-Packard Company
HP Integrity Superdome 32-way (1500 MHz Itanium 2)
SPECompMpeak2001 = 29106      
SPECompMbase2001 = 26823      
SPEC license # HPG2116 Tested by: Hewlett-Packard Company Test site: Richardson, Texas Test date: Sep-2003 Hardware Avail: Oct-2003 Software Avail: Oct-2003
Benchmark Reference
Time
Base
Runtime
Base
Ratio
Peak
Runtime
Peak
Ratio
Graph Scale
310.wupwise_m 6000 142    42131       137    43813       310.wupwise_m base result bar (42131)
310.wupwise_m peak result bar (43813)
312.swim_m 6000 117    51261       117    51261       312.swim_m base result bar (51261)
312.swim_m peak result bar (51261)
314.mgrid_m 7300 240    30464       238    30653       314.mgrid_m base result bar (30464)
314.mgrid_m peak result bar (30653)
316.applu_m 4000 84.2  47501       81.2  49253       316.applu_m base result bar (47501)
316.applu_m peak result bar (49253)
318.galgel_m 5100 695    7339      461    11056       318.galgel_m base result bar (7339)
318.galgel_m peak result bar (11056)
320.equake_m 2600 145    17928       136    19142       320.equake_m base result bar (17928)
320.equake_m peak result bar (19142)
324.apsi_m 3400 87.5  38866       87.5  38866       324.apsi_m base result bar (38866)
324.apsi_m peak result bar (38866)
326.gafort_m 8700 337    25835       337    25835       326.gafort_m base result bar (25835)
326.gafort_m peak result bar (25835)
328.fma3d_m 4600 241    19110       179    25767       328.fma3d_m base result bar (19110)
328.fma3d_m peak result bar (25767)
330.art_m 6400 150    42621       150    42621       330.art_m base result bar (42621)
330.art_m peak result bar (42621)
332.ammp_m 7000 455    15379       436    16050       332.ammp_m base result bar (15379)
332.ammp_m peak result bar (16050)
SPECompMbase2001 26823        
  SPECompMpeak2001 29106        

Hardware
Hardware Vendor: Hewlett-Packard Company
Model Name: HP Integrity Superdome 32-way (1500 MHz Itanium 2)
CPU: Intel Itanium 2
CPU MHz: 1500
FPU: Integrated
CPU(s) enabled: 32
CPU(s) orderable: 6 to 32 by 2
Primary Cache: L1 Inst/Data: 16 KB, associativity = 4
Secondary Cache: L2 Unified: 256 KB, associativity = 8
L3 Cache: L3 Unified: 6144 KB, associativity = 24
Other Cache: None
Memory: 128GB (256 * 512MB DIMMs)
Disk Subsystem: root disk 1x36 SCSI
Other Hardware: --
Software
OpenMP Threads: 32
Parallel: OpenMP
Operating System: HPUX11i-TCOE B.11.23
Compiler: HP C/ANSI C Compiler B.11.23
HP aC++ Compiler B.11.23
HP Fortran 90 Compiler B.11.23
HP LIBF90 PHSS_29620
HP F90 Compiler PHSS_29663
HP aC++ Compiler PHSS_29655
HP C Compiler PHSS_29656
u2comp/be/plugin library PHSS_29657
File System: vxfs
System State: Multi-user
Notes / Tuning Information
  User environment:
     MP_IDLE_THREADS_WAIT=-1
     OMP_FIRST_USE=0
 
  Portability Flags:
    318.galgel: +source=fixed +extend_source
  
  Base:
     F90  +Ofaster +DSitanium2 +Oopenmp   
          +Oinfo +DD64 -minshared  
     cc   +Ofaster +Oopenmp +DD64 +Oinfo +DSitanium2
          -minshared -AOe +Onofltacc
    submit = chatr -s +id disable +pd 256k +pi 256k $commandexe;  \
         _M_ARENA_OPTS=64:32 _M_SBA_OPTS=16348:150:256 \
            mpsched -T FILL $command 
  
  Peak:
    310.wupwise_m:  +Ofaster +O3 +DSitanium2 +Oopenmp 
      +Oinfo +DD64 -minshared +cat -Wl,+pd256k -Wl,+pi256k
      ONESTEP = true 
      submit = chatr -s +id disable $commandexe; 
          _M_ARENA_OPTS=64:32 mpsched -T FILL $command

    312.swim_m:  basepeak=true
 
    314.mgrid_m: basepeak=true
      +Ofaster +DSitanium2 +Oopenmp +Oinfo +DD64 -minshared
      ONESTEP=true
      submit = chatr -s +id disable +pd 256k +pi 256k $commandexe
         _M_ARENA_OPTS=64:32 _M_SBA_OPTS=16348:150:256  mpsched -T FILL $command
 
    316.applu_m:  +Ofaster +DSitanium2  +Oopenmp +Oinfo +DSitanium
      +DD64 -minshared
      ONESTEP=true
      submit = chatr -s +id disable +pd 256k +pi 256k $commandexe; 
          _M_ARENA_OPTS=64:32 mpsched -T FILL $command
 
    318.galgel_m: +Ofaster +DSitanium2 +Oopenmp +Oinfo
      +DD64 -minshared +Onodataprefetch +Oloop_unroll=14
      ONESTEP = true
      submit  = chatr -s +id disable +pd 256k +pi 256k $commandexe; 
      OMP_NUM_THREADS=9  _M_ARENA_OPTS=64:32 mpsched -T FILL $command

    320.equake_m:  +Ofaster +Oopenmp  +DD64  +Oinfo
      +DSitanium2 -minshared -AOe +Onofltacc +Onoparmsoverlap 
      submit  = chatr -s +id disable +pd 64k +pi 64k $commandexe; 
      _M_ARENA_OPTS=64:32 mpsched -T FILL $command
 
    324.apsi_m: basepeak=true

    326.gafort_m: basepeak=true
 
    328.fma3d_m: +Ofaster +DSitanium2  +Oopenmp +Oinfo +DD64 
      -minshared  +Oinline_budget=75 
      ONESTEP=true
      submit = chatr -s +id disable  +pd 1m +pi 1m $commandexe; 
         _M_ARENA_OPTS=64:32 mpsched -T FILL $command
 
    330.art_m: basepeak=true
      
    332.ammp_m: +Ofaster +Oopenmp  +DD64  +Oinfo 
      +DSitanium2 -minshared -AOe +Onofltacc
      submit = chatr -s +id disable +pd 16k +pi 16k $commandexe;  
           _M_ARENA_OPTS=64:32 mpsched -T FILL $command
 
 
 Alternate Sources:  
   hpg.1 C++ compiler compatible sources
   from SPEC Web site  ompm2001-isoc-20020619.tar.gz
     used for Base 320.equake_m 330.art_m 332.ammp_m 
     used for Peak 332.ammp_m 
 
   ompl.32 OMPL 32 bit compatible sources 
   from SPEC Web site ompm2001-srcl32bit-20020822.tar.gz 
     used for Peak 310.wupwise_m 328.fma3d_m
 
  Kernel Paramters (/stand/system):
     maxdsiz         0xc0000000
     maxdsiz_64bit   0x3ffbfffffff
     maxssiz         0x17f00000
     maxssiz_64bit   0x40000000
     maxtsiz         0x40000000
     maxtsiz_64bit   0x40000000
     vps_pagesize    4096
     vps_ceiling     16384
     dbc_min_pct     20
     dbc_max_pct     20
     swapmem_on      0
 
Notes:

  System was configured with 1/2 of memory interleaved and
    1/2 of memory local to each cell

  System configured as a single partition with 8 cells and 
    4 processors per cell

  Threads were assigned to cpus using the FILL strategy
    from the HP-UX mpsched utility

  Memory tuning is documented in man page malloc(3C)
    _M_ARENA_OPTS=64:32
      64 malloc arenas, 32 4k pages expansion

    _M_SBA_OPTS=16348:150:256  
      16384 maxfast size, 150 small blocks, 256 grain size





For questions about this result, please contact the tester.
For other inquiries, please contact [email protected]
Copyright © 1999-2002 Standard Performance Evaluation Corporation

First published at SPEC.org on 15-Oct-2003

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