SPEC CPU®2017 Integer Speed Result

Copyright 2017-2021 Standard Performance Evaluation Corporation

Huawei (Test Sponsor: China Academy of Information and Communications Technology)

Huawei CH121 V5 (Intel Xeon Gold 6246R)

SPECspeed®2017_int_base = 11.70

SPECspeed®2017_int_peak = Not Run

CPU2017 License: 6177 Test Date: Jan-2021
Test Sponsor: China Academy of Information and Communications Technology Hardware Availability: Jul-2020
Tested by: China Academy of Information and Communications Technology Software Availability: Apr-2020

Benchmark result graphs are available in the PDF report.

Hardware
CPU Name: Intel Xeon Gold 6246R
  Max MHz: 4100
  Nominal: 3400
Enabled: 32 cores, 2 chips
Orderable: 1,2 chips
Cache L1: 32 KB I + 32 KB D on chip per core
  L2: 1 MB I+D on chip per core
  L3: 35.75 MB I+D on chip per chip
  Other: None
Memory: 768 GB (24 x 32 GB 2Rx4 PC4-2933Y-R)
Storage: 1 x 960 GB SSD
Other: None
Software
OS: SUSE Linux Enterprise Server 12 SP4 (x86_64)
Kernel 4.12.14-94.41-default
Compiler: C/C++: Version 19.1.1.217 of Intel C/C++
Compiler for Linux;
Fortran: Version 19.1.1.217 of Intel Fortran
Compiler for Linux
Parallel: Yes
Firmware: Version 6.83 released Jun-2019
File System: xfs
System State: Run level 3 (multi-user)
Base Pointers: 64-bit
Peak Pointers: Not Applicable
Other: jemalloc memory allocator V5.0.1
Power Management: BIOS set to prefer performance at the cost of
additional power usage.

Results Table

Benchmark Base Peak
Threads Seconds Ratio Seconds Ratio Seconds Ratio Threads Seconds Ratio Seconds Ratio Seconds Ratio
SPECspeed®2017_int_base 11.70
SPECspeed®2017_int_peak Not Run
Results appear in the order in which they were run. Bold underlined text indicates a median measurement.
600.perlbench_s 32 2500 7.10 2490 7.12 2490 7.12
602.gcc_s 32 3650 10.90 3680 10.80 3670 10.90
605.mcf_s 32 2380 19.80 2390 19.80 2440 19.40
620.omnetpp_s 32 1650 9.88 1610 10.10 1640 9.92
623.xalancbmk_s 32 98.7 14.40 98.1 14.40 99.8 14.20
625.x264_s 32 1050 16.80 1050 16.90 1050 16.80
631.deepsjeng_s 32 2350 6.10 2350 6.10 2350 6.10
641.leela_s 32 3360 5.08 3360 5.08 3360 5.08
648.exchange2_s 32 1690 17.40 1690 17.40 1690 17.30
657.xz_s 32 2520 24.60 2520 24.50 2530 24.50

Compiler Notes

 The inconsistent Compiler version information under Compiler Version section is due to a discrepancy in Intel Compiler.
 The correct version of C/C++ compiler is: Version 19.1.1.217 Build 20200306 Compiler for Linux
 The correct version of Fortran compiler is: Version 19.1.1.217 Build 20200306 Compiler for Linux

Operating System Notes

 Stack size set to unlimited using "ulimit -s unlimited"

Environment Variables Notes

Environment variables set by runcpu before the start of the run:
KMP_AFFINITY = "granularity=fine,compact,1,0"
LD_LIBRARY_PATH =
     "/opt/intel/compilers_and_libraries_2020.1.217/linux/compiler/lib/intel6
     4:/usr/local/jemalloc64-5.0.1"
MALLOC_CONF = "retain:true"
OMP_STACKSIZE = "192M"

General Notes

 NA: The test sponsor attests, as of date of publication, that CVE-2017-5754 (Meltdown)
 is mitigated in the system as tested and documented.
 Yes: The test sponsor attests, as of date of publication, that CVE-2017-5753 (Spectre variant 1)
 is mitigated in the system as tested and documented.
 Yes: The test sponsor attests, as of date of publication, that CVE-2017-5715 (Spectre variant 2)
 is mitigated in the system as tested and documented.
 Transparent Huge Pages enabled by default
 Prior to runcpu invocation
 Filesystem page cache synced and cleared with:
 sync; echo 3>       /proc/sys/vm/drop_caches
 jemalloc, a general purpose malloc implementation
 built with the RedHat Enterprise 7.5, and the system compiler gcc 4.8.5
 sources available from jemalloc.net or https://github.com/jemalloc/jemalloc/releases

Platform Notes

 BIOS configuration:
 Power Policy Set to Load Balance
 Hyper-Threading Set to Disabled
 XPT Prefetch Set to Enabled

 Sysinfo program /spec2017/bin/sysinfo
 Rev: r6365 of 2019-08-21 295195f888a3d7edb1e6e46a485a0011
 running on linux-j3dr Mon Jan 18 16:52:46 2021

 SUT (System Under Test) info as seen by some common utilities.
 For more information on this section, see
    https://www.spec.org/cpu2017/Docs/config.html#sysinfo

 From /proc/cpuinfo
    model name : Intel(R) Xeon(R) Gold 6246R CPU @ 3.40GHz
       2  "physical id"s (chips)
       32 "processors"
    cores, siblings (Caution: counting these is hw and system dependent. The following
    excerpts from /proc/cpuinfo might not be reliable.  Use with caution.)
       cpu cores : 16
       siblings  : 16
       physical 0: cores 0 2 3 5 6 9 10 12 13 16 18 20 21 24 27 29
       physical 1: cores 0 2 3 5 6 9 10 12 13 16 18 20 21 24 27 29

 From lscpu:
      Architecture:          x86_64
      CPU op-mode(s):        32-bit, 64-bit
      Byte Order:            Little Endian
      CPU(s):                32
      On-line CPU(s) list:   0-31
      Thread(s) per core:    1
      Core(s) per socket:    16
      Socket(s):             2
      NUMA node(s):          2
      Vendor ID:             GenuineIntel
      CPU family:            6
      Model:                 85
      Model name:            Intel(R) Xeon(R) Gold 6246R CPU @ 3.40GHz
      Stepping:              7
      CPU MHz:               3400.000
      CPU max MHz:           4100.0000
      CPU min MHz:           1200.0000
      BogoMIPS:              6800.00
      Virtualization:        VT-x
      L1d cache:             32K
      L1i cache:             32K
      L2 cache:              1024K
      L3 cache:              36608K
      NUMA node0 CPU(s):     0-15
      NUMA node1 CPU(s):     16-31
      Flags:                 fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov
      pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp
      lm constant_tsc art arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc cpuid
      aperfmperf pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 sdbg fma cx16
      xtpr pdcm pcid dca sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave
      avx f16c rdrand lahf_lm abm 3dnowprefetch cpuid_fault epb cat_l3 cdp_l3
      invpcid_single ssbd mba ibrs ibpb stibp tpr_shadow vnmi flexpriority ept vpid
      fsgsbase tsc_adjust bmi1 hle avx2 smep bmi2 erms invpcid rtm cqm mpx rdt_a avx512f
      avx512dq rdseed adx smap clflushopt clwb intel_pt avx512cd avx512bw avx512vl
      xsaveopt xsavec xgetbv1 xsaves cqm_llc cqm_occup_llc cqm_mbm_total cqm_mbm_local
      dtherm ida arat pln pts pku ospke avx512_vnni flush_l1d arch_capabilities

 /proc/cpuinfo cache data
    cache size : 36608 KB

 From numactl --hardware  WARNING: a numactl 'node' might or might not correspond to a
 physical chip.
   available: 2 nodes (0-1)
   node 0 cpus: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
   node 0 size: 385580 MB
   node 0 free: 385125 MB
   node 1 cpus: 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
   node 1 size: 387036 MB
   node 1 free: 386478 MB
   node distances:
   node   0   1
     0:  10  21
     1:  21  10

 From /proc/meminfo
    MemTotal:       791159924 kB
    HugePages_Total:       0
    Hugepagesize:       2048 kB

 From /etc/*release* /etc/*version*
    SuSE-release:
       SUSE Linux Enterprise Server 12 (x86_64)
       VERSION = 12
       PATCHLEVEL = 4
       # This file is deprecated and will be removed in a future service pack or release.
       # Please check /etc/os-release for details about this release.
    os-release:
       NAME="SLES"
       VERSION="12-SP4"
       VERSION_ID="12.4"
       PRETTY_NAME="SUSE Linux Enterprise Server 12 SP4"
       ID="sles"
       ANSI_COLOR="0;32"
       CPE_NAME="cpe:/o:suse:sles:12:sp4"

 uname -a:
    Linux linux-j3dr 4.12.14-94.41-default #1 SMP Wed Oct 31 12:25:04 UTC 2018 (3090901)
    x86_64 x86_64 x86_64 GNU/Linux

 Kernel self-reported vulnerability status:

 CVE-2018-3620 (L1 Terminal Fault):        Not affected
 Microarchitectural Data Sampling:         No status reported
 CVE-2017-5754 (Meltdown):                 Not affected
 CVE-2018-3639 (Speculative Store Bypass): Mitigation: Speculative Store Bypass disabled
                                           via prctl and seccomp
 CVE-2017-5753 (Spectre variant 1):        Mitigation: __user pointer sanitization
 CVE-2017-5715 (Spectre variant 2):        Mitigation: Indirect Branch Restricted
                                           Speculation, IBPB, IBRS_FW

 run-level 3 Jan 18 16:11

 SPEC is set to: /spec2017
    Filesystem     Type  Size  Used Avail Use% Mounted on
    /dev/sda3      xfs   734G   48G  687G   7% /

 From /sys/devices/virtual/dmi/id
     BIOS:    INSYDE Corp. 6.83 06/29/2019
     Vendor:  Huawei
     Product: CH121 V5
     Product Family: Purley
     Serial:  Serial Number

 Additional information from dmidecode follows.  WARNING: Use caution when you interpret
 this section. The 'dmidecode' program reads system data which is "intended to allow
 hardware to be accurately determined", but the intent may not be met, as there are
 frequent changes to hardware, firmware, and the "DMTF SMBIOS" standard.
   Memory:
     24x Samsung M393A4K40CB2-CVF 32 GB 2 rank 2933

 (End of data from sysinfo program)

Compiler Version Notes

==============================================================================
C       | 600.perlbench_s(base) 602.gcc_s(base) 605.mcf_s(base)
        | 625.x264_s(base) 657.xz_s(base)
------------------------------------------------------------------------------
Intel(R) C Compiler for applications running on Intel(R) 64, Version 2021.1
  NextGen Build 20200304
Copyright (C) 1985-2020 Intel Corporation. All rights reserved.
------------------------------------------------------------------------------

==============================================================================
C++     | 620.omnetpp_s(base) 623.xalancbmk_s(base) 631.deepsjeng_s(base)
        | 641.leela_s(base)
------------------------------------------------------------------------------
Intel(R) C++ Compiler for applications running on Intel(R) 64, Version 2021.1
  NextGen Build 20200304
Copyright (C) 1985-2020 Intel Corporation. All rights reserved.
------------------------------------------------------------------------------

==============================================================================
Fortran | 648.exchange2_s(base)
------------------------------------------------------------------------------
Intel(R) Fortran Intel(R) 64 Compiler for applications running on Intel(R)
  64, Version 19.1.1.217 Build 20200306
Copyright (C) 1985-2020 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

Base Compiler Invocation

C benchmarks:

 icc 

C++ benchmarks:

 icpc 

Fortran benchmarks:

 ifort 

Base Portability Flags

600.perlbench_s:  -DSPEC_LP64   -DSPEC_LINUX_X64 
602.gcc_s:  -DSPEC_LP64 
605.mcf_s:  -DSPEC_LP64 
620.omnetpp_s:  -DSPEC_LP64 
623.xalancbmk_s:  -DSPEC_LP64   -DSPEC_LINUX 
625.x264_s:  -DSPEC_LP64 
631.deepsjeng_s:  -DSPEC_LP64 
641.leela_s:  -DSPEC_LP64 
648.exchange2_s:  -DSPEC_LP64 
657.xz_s:  -DSPEC_LP64 

Base Optimization Flags

C benchmarks:

 -m64   -qnextgen   -std=c11   -Wl,-plugin-opt=-x86-branches-within-32B-boundaries   -Wl,-z,muldefs   -xCORE-AVX512   -O3   -ffast-math   -flto   -mfpmath=sse   -funroll-loops   -fuse-ld=gold   -qopt-mem-layout-trans=4   -fopenmp   -DSPEC_OPENMP   -L/usr/local/jemalloc64-5.0.1/   -ljemalloc 

C++ benchmarks:

 -m64   -qnextgen   -Wl,-plugin-opt=-x86-branches-within-32B-boundaries   -Wl,-z,muldefs   -xCORE-AVX512   -O3   -ffast-math   -flto   -mfpmath=sse   -funroll-loops   -fuse-ld=gold   -qopt-mem-layout-trans=4   -L/opt/intel/compilers_and_libraries_2020.1.217/linux/compiler/lib/intel64_lin   -lqkmalloc 

Fortran benchmarks:

 -m64   -Wl,-plugin-opt=-x86-branches-within-32B-boundaries   -xCORE-AVX512   -O3   -ipo   -no-prec-div   -qopt-mem-layout-trans=4   -nostandard-realloc-lhs   -align array32byte   -mbranches-within-32B-boundaries 

The flags files that were used to format this result can be browsed at
http://www.spec.org/cpu2017/flags/Intel-ic19.1u1-official-linux64_revB.html,
http://www.spec.org/cpu2017/flags/CAICT-Platform-Settings-V1.3.html.

You can also download the XML flags sources by saving the following links:
http://www.spec.org/cpu2017/flags/Intel-ic19.1u1-official-linux64_revB.xml,
http://www.spec.org/cpu2017/flags/CAICT-Platform-Settings-V1.3.xml.