# Invocation command line:
# /home/bsc/cpu2006/bin/runspec --config=BladeSymphony_int_rate -T all --reportable --rate --copies=8 int
# output_root was not used for this run
############################################################################
############################################################################
# SPEC CPU2006 Intel Linux64 config file
# HITACHI BladeSymphony
# Intel Composer XE for Linux64

action      = validate
tune        = base
ext         = cpu2006.linux64.ic120.exe
PATHSEP     = /
check_md5   = 1
reportable  = 1
mean_anyway = 1
bench_post_setup = sync

bind0         = numactl -m 0 --physcpubind=0
bind1         = numactl -m 1 --physcpubind=1
bind2         = numactl -m 0 --physcpubind=2
bind3         = numactl -m 1 --physcpubind=3
bind4         = numactl -m 0 --physcpubind=4
bind5         = numactl -m 1 --physcpubind=5
bind6         = numactl -m 0 --physcpubind=6
bind7         = numactl -m 1 --physcpubind=7
bind8         = numactl -m 0 --physcpubind=8
bind9         = numactl -m 1 --physcpubind=9
bind10        = numactl -m 0 --physcpubind=10
bind11        = numactl -m 1 --physcpubind=11
bind12        = numactl -m 0 --physcpubind=12
bind13        = numactl -m 1 --physcpubind=13
bind14        = numactl -m 0 --physcpubind=14
bind15        = numactl -m 1 --physcpubind=15
bind16        = numactl -m 0 --physcpubind=16
bind17        = numactl -m 1 --physcpubind=17
bind18        = numactl -m 0 --physcpubind=18
bind19        = numactl -m 1 --physcpubind=19
bind20        = numactl -m 0 --physcpubind=20
bind21        = numactl -m 1 --physcpubind=21
bind22        = numactl -m 0 --physcpubind=22
bind23        = numactl -m 1 --physcpubind=23
submit       = echo "$command" > run.sh ; $BIND bash run.sh

##### Compiler section
int=default=default=default:
CC  = icc -m32
CXX = icpc -m32
OBJ = .o
SMARTHEAP_DIR = /home/bsc/smartheap/lib
LDOPT= -B /usr/share/libhugetlbfs/ -Wl,-hugetlbfs-link=BDT

##### SSE4.2
SSE          = -xSSE4.2
FAST         =  $(SSE) -ipo -O3 -no-prec-div -static
FASTNOSTATIC =  $(SSE) -ipo -O3 -no-prec-div

##### Portability & libraries

400.perlbench=default:
CPORTABILITY=      -DSPEC_CPU_LINUX_IA32

403.gcc=default:
EXTRA_CFLAGS=      -Dalloca=_alloca

462.libquantum=default:
CPORTABILITY=      -DSPEC_CPU_LINUX

483.xalancbmk=default:
CXXPORTABILITY=    -DSPEC_CPU_LINUX

##### Tuning Flags
default=base=default=default:
sw_base_ptrsize = 32-bit
sw_peak_ptrsize = 32/64-bit

471.omnetpp,473.astar,483.xalancbmk=default:
EXTRA_LIBS=  -L$(SMARTHEAP_DIR) -lsmartheap
EXTRA_LDFLAGS= -Wl,-z,muldefs

int=base=default=default:
COPTIMIZE= $(FASTNOSTATIC) -opt-prefetch
CXXOPTIMIZE= $(FASTNOSTATIC) -opt-prefetch

int=peak=default=default:
COPTIMIZE= -auto-ilp32 -ansi-alias
CXXOPTIMIZE= -ansi-alias
PASS1_CFLAGS = -prof-gen
PASS2_CFLAGS = $(FASTNOSTATIC) -prof-use
PASS1_CXXFLAGS = -prof-gen
PASS2_CXXFLAGS = $(FASTNOSTATIC) -prof-use
PASS1_LDCFLAGS = -prof-gen
PASS2_LDCFLAGS = $(FASTNOSTATIC) -prof-use
PASS1_LDCXXFLAGS =  -prof-gen
PASS2_LDCXXFLAGS = $(FASTNOSTATIC) -prof-use

400.perlbench=peak=default:
COPTIMIZE= -ansi-alias
PASS1_CFLAGS = -prof-gen
PASS2_CFLAGS = $(FAST) -prof-use
PASS1_LDCFLAGS = -prof-gen
PASS2_LDCFLAGS = $(FAST) -prof-use
PASS1_LDOPT=
PASS2_LDOPT=

401.bzip2=peak=default:
CC= icc -m64
CPORTABILITY= -DSPEC_CPU_LP64
COPTIMIZE= -opt-prefetch -ansi-alias -auto-ilp32
PASS1_CFLAGS = -prof-gen
PASS2_CFLAGS = $(FAST) -prof-use
PASS1_LDCFLAGS = -prof-gen
PASS2_LDCFLAGS = $(FAST) -prof-use
PASS1_LDOPT=
PASS2_LDOPT=

403.gcc=peak=default:
COPTIMIZE = $(FASTNOSTATIC)
feedback=0

429.mcf=peak=default:
#######################################################################
%ifdef %{up-nhm}
copies=4
%endif
%ifdef %{dp-nhm}
copies=8
%endif
%ifdef %{up-wsm-6c}
copies=6
%endif
%ifdef %{dp-wsm-6c}
copies=12
%endif
%ifdef %{1p-nhm-ex}
copies=8
%endif
%ifdef %{2p-nhm-ex}
copies=16
%endif
%ifdef %{4p-nhm-ex}
copies=32
%endif
#######################################################################

445.gobmk=peak=default:
COPTIMIZE= -O2 -ipo -no-prec-div -ansi-alias
PASS1_CFLAGS     = -prof-gen
PASS2_CFLAGS     = $(SSE) -prof-use
PASS1_LDCFLAGS   = -prof-gen
PASS2_LDCFLAGS   = $(SSE) -prof-use
PASS1_LDOPT=
PASS2_LDOPT=

456.hmmer=peak=default:
CC= icc -m64
CPORTABILITY= -DSPEC_CPU_LP64
COPTIMIZE= $(FASTNOSTATIC) -unroll2 -auto-ilp32
feedback=no
LDOPT= -B /usr/share/libhugetlbfs/ -Wl,-melf_x86_64 -Wl,-hugetlbfs-link=BDT
#######################################################################
%ifdef %{up-nhm}
copies=4
%endif
%ifdef %{dp-nhm}
copies=8
%endif
%ifdef %{up-wsm-6c}
copies=6
%endif
%ifdef %{dp-wsm-6c}
copies=12
%endif
%ifdef %{1p-nhm-ex}
copies=8
%endif
%ifdef %{2p-nhm-ex}
copies=16
%endif
%ifdef %{4p-nhm-ex}
copies=32
%endif
#######################################################################

458.sjeng=peak=default:
CC= icc -m64
CPORTABILITY= -DSPEC_CPU_LP64
COPTIMIZE= -unroll4 -auto-ilp32
PASS1_LDOPT= -B /usr/share/libhugetlbfs/ -Wl,-melf_x86_64 -Wl,-hugetlbfs-link=BDT
PASS2_LDOPT= -B /usr/share/libhugetlbfs/ -Wl,-melf_x86_64 -Wl,-hugetlbfs-link=BDT

462.libquantum=peak=default:
basepeak=yes

464.h264ref=peak=default:
COPTIMIZE= -unroll2 -ansi-alias

471.omnetpp=peak=default:
CXXOPTIMIZE=  -ansi-alias -opt-ra-region-strategy=block

473.astar=peak=default:
basepeak=yes

483.xalancbmk=peak=default:
basepeak=yes

#################################################################
default=default=default=default:
license_num      = 35
test_sponsor     = HITACHI
hw_avail         = Feb-2011
sw_avail         = Jan-2011
tester           = HITACHI
hw_cpu_name      = Intel Xeon E5603
hw_cpu_char      =
hw_cpu_mhz       = 1600
hw_disk          = 2 x 147 GB 10000 rpm SAS RAID1 configuration
hw_fpu           = Integrated
hw_memory000     = 48 GB (6 x 8 GB 2Rx4 PC3-10600R-9, ECC,
hw_memory001     = running at 1066 MHz)
hw_model         = BladeSymphony BS320 (Intel Xeon E5603)
hw_ncpuorder     = 1, 2 chips
hw_ncores        = 8
hw_nchips        = 2
hw_ncoresperchip = 4
hw_nthreadspercore = 1
hw_other         = None
hw_pcache        = 32 KB I + 32 KB D on chip per core
hw_scache        = 256 KB I+D on chip per core
hw_tcache        = 4 MB I+D on chip per chip
hw_ocache        = None
hw_vendor        = HITACHI
prepared_by      = HITACHI
sw_file          = ext3
sw_os000         = Red Hat Enterprise Linux
sw_os001         = Server release 5.4.3, Advanced Platform,
sw_os002         = Kernel 2.6.18-164.9.1.el5 on an x86_64
sw_state         = Run level 3 (multi-user)
sw_other         = Microquill SmartHeap V8.1

int=default=default=default:
sw_compiler000   = Intel C++ Compiler XE for Linux
sw_compiler001   = Version 12.0.2.137 Build 20110112

notes_submit_000= '/usr/bin/numactl' used to bind processes to CPUs
notes_plat_000= BIOS Settings:
notes_plat_005= Data Reuse Optimization = Disabled
notes_os_000= 'ulimit -s unlimited' was used to set the stacksize to unlimited prior to run
notes_os_005= Hugepages was enabled with the following:
notes_os_010= 'nodev   /mnt/hugepages   hugetlbfs  defaults   0 0' added to /etc/fstab
notes_os_015= echo 10800 > /proc/sys/vm/nr_hugepages
notes_os_020= export HUGETLB_MORECORE=yes
notes_os_025= export LD_PRELOAD=/usr/lib64/libhugetlbfs.so




# The following section was added automatically, and contains settings that
# did not appear in the original configuration file, but were added to the
# raw file after the run.
default:
flagsurl000 = http://www.spec.org/cpu2006/flags/Intel-ic12.0-linux64-revB.xml
flagsurl001 = http://www.spec.org/cpu2006/flags/PlatformHitachi.xml