SPEC CPU(R)2017 Integer Rate Result Cisco Systems Cisco UCS C480 M5 (Intel Xeon Platinum 8268, 2.90GHz) CPU2017 License: 9019 Test date: Oct-2019 Test sponsor: Cisco Systems Hardware availability: Apr-2019 Tested by: Cisco Systems Software availability: May-2019 Base Base Base Peak Peak Peak Benchmarks Copies Run Time Rate Copies Run Time Rate --------------- ------- --------- --------- ------- --------- --------- 500.perlbench_r 192 636 481 S 500.perlbench_r 192 638 479 S 500.perlbench_r 192 636 480 * 502.gcc_r 192 580 469 S 502.gcc_r 192 576 472 S 502.gcc_r 192 576 472 * 505.mcf_r 192 398 780 S 505.mcf_r 192 396 783 S 505.mcf_r 192 397 781 * 520.omnetpp_r 192 682 369 * 520.omnetpp_r 192 682 369 S 520.omnetpp_r 192 681 370 S 523.xalancbmk_r 192 314 646 S 523.xalancbmk_r 192 314 646 * 523.xalancbmk_r 192 312 649 S 525.x264_r 192 260 1290 S 525.x264_r 192 261 1290 * 525.x264_r 192 263 1280 S 531.deepsjeng_r 192 425 518 S 531.deepsjeng_r 192 425 518 S 531.deepsjeng_r 192 425 518 * 541.leela_r 192 636 500 * 541.leela_r 192 631 504 S 541.leela_r 192 640 497 S 548.exchange2_r 192 393 1280 S 548.exchange2_r 192 396 1270 S 548.exchange2_r 192 394 1280 * 557.xz_r 192 517 401 * 557.xz_r 192 517 401 S 557.xz_r 192 516 402 S ================================================================================= 500.perlbench_r 192 636 480 * 502.gcc_r 192 576 472 * 505.mcf_r 192 397 781 * 520.omnetpp_r 192 682 369 * 523.xalancbmk_r 192 314 646 * 525.x264_r 192 261 1290 * 531.deepsjeng_r 192 425 518 * 541.leela_r 192 636 500 * 548.exchange2_r 192 394 1280 * 557.xz_r 192 517 401 * SPECrate(R)2017_int_base 611 SPECrate(R)2017_int_peak Not Run HARDWARE -------- CPU Name: Intel Xeon Platinum 8268 Max MHz: 3900 Nominal: 2900 Enabled: 96 cores, 4 chips, 2 threads/core Orderable: 2,4 Chips Cache L1: 32 KB I + 32 KB D on chip per core L2: 1 MB I+D on chip per core L3: 35.75 MB I+D on chip per chip Other: None Memory: 1536 GB (48 x 32 GB 2Rx4 PC4-2933V-R) Storage: 1 x 600 GB 15K RPM SAS HDD Other: None SOFTWARE -------- OS: SUSE Linux Enterprise Server 15 (x86_64) 4.12.14-23-default Compiler: C/C++: Version 19.0.4.227 of Intel C/C++ Compiler for Linux; Fortran: Version 19.0.4.227 of Intel Fortran Compiler for Linux Parallel: No Firmware: Version 4.0.3 released Mar-2019 File System: xfs System State: Run level 3 (multi-user) Base Pointers: 64-bit Peak Pointers: Not Applicable Other: None Power Management: default Submit Notes ------------ The numactl mechanism was used to bind copies to processors. The config file option 'submit' was used to generate numactl commands to bind each copy to a specific processor. For details, please see the config file. Operating System Notes ---------------------- Stack size set to unlimited using "ulimit -s unlimited" Environment Variables Notes --------------------------- Environment variables set by runcpu before the start of the run: LD_LIBRARY_PATH = "/home/cpu2017/lib/intel64:/home/cpu2017/lib/ia32:/home/cpu2017/je5.0.1- 32" General Notes ------------- Binaries compiled on a system with 1x Intel Core i9-7900X CPU + 32GB RAM memory using Redhat Enterprise Linux 7.5 Transparent Huge Pages enabled by default Prior to runcpu invocation Filesystem page cache synced and cleared with: sync; echo 3> /proc/sys/vm/drop_caches runcpu command invoked through numactl i.e.: numactl --interleave=all runcpu NA: The test sponsor attests, as of date of publication, that CVE-2017-5754 (Meltdown) is mitigated in the system as tested and documented. Yes: The test sponsor attests, as of date of publication, that CVE-2017-5753 (Spectre variant 1) is mitigated in the system as tested and documented. Yes: The test sponsor attests, as of date of publication, that CVE-2017-5715 (Spectre variant 2) is mitigated in the system as tested and documented. Platform Notes -------------- BIOS Settings: Intel HyperThreading Technology set to Enabled SNC set to Enabled IMC Interleaving set to 1-way Interleave Patrol Scrub set to Disabled Sysinfo program /home/cpu2017/bin/sysinfo Rev: r6365 of 2019-08-21 295195f888a3d7edb1e6e46a485a0011 running on linux-mz3p Thu Oct 17 14:51:18 2019 SUT (System Under Test) info as seen by some common utilities. For more information on this section, see https://www.spec.org/cpu2017/Docs/config.html#sysinfo From /proc/cpuinfo model name : Intel(R) Xeon(R) Platinum 8268 CPU @ 2.90GHz 4 "physical id"s (chips) 192 "processors" cores, siblings (Caution: counting these is hw and system dependent. The following excerpts from /proc/cpuinfo might not be reliable. Use with caution.) cpu cores : 24 siblings : 48 physical 0: cores 0 1 2 3 4 5 6 8 9 10 11 12 13 16 17 18 19 20 21 25 26 27 28 29 physical 1: cores 0 1 2 3 4 5 6 8 9 10 11 12 13 16 17 18 19 20 21 25 26 27 28 29 physical 2: cores 0 1 2 3 4 5 6 9 10 11 12 13 16 17 18 19 20 21 24 25 26 27 28 29 physical 3: cores 0 1 2 3 4 5 6 8 10 11 12 13 16 17 18 19 20 21 24 25 26 27 28 29 From lscpu: Architecture: x86_64 CPU op-mode(s): 32-bit, 64-bit Byte Order: Little Endian CPU(s): 192 On-line CPU(s) list: 0-191 Thread(s) per core: 2 Core(s) per socket: 24 Socket(s): 4 NUMA node(s): 8 Vendor ID: GenuineIntel CPU family: 6 Model: 85 Model name: Intel(R) Xeon(R) Platinum 8268 CPU @ 2.90GHz Stepping: 6 CPU MHz: 2900.000 CPU max MHz: 3900.0000 CPU min MHz: 1200.0000 BogoMIPS: 5800.00 Virtualization: VT-x L1d cache: 32K L1i cache: 32K L2 cache: 1024K L3 cache: 36608K NUMA node0 CPU(s): 0-3,7-9,13-15,19,20,96-99,103-105,109-111,115,116 NUMA node1 CPU(s): 4-6,10-12,16-18,21-23,100-102,106-108,112-114,117-119 NUMA node2 CPU(s): 24-27,31-33,37-39,43,44,120-123,127-129,133-135,139,140 NUMA node3 CPU(s): 28-30,34-36,40-42,45-47,124-126,130-132,136-138,141-143 NUMA node4 CPU(s): 48-51,55,56,60-62,66-68,144-147,151,152,156-158,162-164 NUMA node5 CPU(s): 52-54,57-59,63-65,69-71,148-150,153-155,159-161,165-167 NUMA node6 CPU(s): 72-75,79,80,84-86,90-92,168-171,175,176,180-182,186-188 NUMA node7 CPU(s): 76-78,81-83,87-89,93-95,172-174,177-179,183-185,189-191 Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc art arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc cpuid aperfmperf tsc_known_freq pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 sdbg fma cx16 xtpr pdcm pcid dca sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm abm 3dnowprefetch cpuid_fault epb cat_l3 cdp_l3 invpcid_single mba tpr_shadow vnmi flexpriority ept vpid fsgsbase tsc_adjust bmi1 hle avx2 smep bmi2 erms invpcid rtm cqm mpx rdt_a avx512f avx512dq rdseed adx smap clflushopt clwb intel_pt avx512cd avx512bw avx512vl xsaveopt xsavec xgetbv1 xsaves cqm_llc cqm_occup_llc cqm_mbm_total cqm_mbm_local ibpb ibrs stibp dtherm ida arat pln pts hwp hwp_act_window hwp_epp hwp_pkg_req pku ospke avx512_vnni arch_capabilities ssbd /proc/cpuinfo cache data cache size : 36608 KB From numactl --hardware WARNING: a numactl 'node' might or might not correspond to a physical chip. available: 8 nodes (0-7) node 0 cpus: 0 1 2 3 7 8 9 13 14 15 19 20 96 97 98 99 103 104 105 109 110 111 115 116 node 0 size: 192094 MB node 0 free: 191650 MB node 1 cpus: 4 5 6 10 11 12 16 17 18 21 22 23 100 101 102 106 107 108 112 113 114 117 118 119 node 1 size: 193526 MB node 1 free: 193224 MB node 2 cpus: 24 25 26 27 31 32 33 37 38 39 43 44 120 121 122 123 127 128 129 133 134 135 139 140 node 2 size: 193526 MB node 2 free: 193363 MB node 3 cpus: 28 29 30 34 35 36 40 41 42 45 46 47 124 125 126 130 131 132 136 137 138 141 142 143 node 3 size: 193526 MB node 3 free: 193371 MB node 4 cpus: 48 49 50 51 55 56 60 61 62 66 67 68 144 145 146 147 151 152 156 157 158 162 163 164 node 4 size: 193526 MB node 4 free: 193368 MB node 5 cpus: 52 53 54 57 58 59 63 64 65 69 70 71 148 149 150 153 154 155 159 160 161 165 166 167 node 5 size: 193497 MB node 5 free: 193342 MB node 6 cpus: 72 73 74 75 79 80 84 85 86 90 91 92 168 169 170 171 175 176 180 181 182 186 187 188 node 6 size: 193526 MB node 6 free: 193335 MB node 7 cpus: 76 77 78 81 82 83 87 88 89 93 94 95 172 173 174 177 178 179 183 184 185 189 190 191 node 7 size: 193523 MB node 7 free: 193366 MB node distances: node 0 1 2 3 4 5 6 7 0: 10 11 21 21 21 21 21 21 1: 11 10 21 21 21 21 21 21 2: 21 21 10 11 21 21 21 21 3: 21 21 11 10 21 21 21 21 4: 21 21 21 21 10 11 21 21 5: 21 21 21 21 11 10 21 21 6: 21 21 21 21 21 21 10 11 7: 21 21 21 21 21 21 11 10 From /proc/meminfo MemTotal: 1583868080 kB HugePages_Total: 0 Hugepagesize: 2048 kB From /etc/*release* /etc/*version* os-release: NAME="SLES" VERSION="15" VERSION_ID="15" PRETTY_NAME="SUSE Linux Enterprise Server 15" ID="sles" ID_LIKE="suse" ANSI_COLOR="0;32" CPE_NAME="cpe:/o:suse:sles:15" uname -a: Linux linux-mz3p 4.12.14-23-default #1 SMP Tue May 29 21:04:44 UTC 2018 (cd0437b) x86_64 x86_64 x86_64 GNU/Linux Kernel self-reported vulnerability status: CVE-2018-3620 (L1 Terminal Fault): No status reported Microarchitectural Data Sampling: No status reported CVE-2017-5754 (Meltdown): Not affected CVE-2018-3639 (Speculative Store Bypass): Mitigation: Speculative Store Bypass disabled via prctl and seccomp CVE-2017-5753 (Spectre variant 1): Mitigation: __user pointer sanitization CVE-2017-5715 (Spectre variant 2): Mitigation: Indirect Branch Restricted Speculation, IBPB, IBRS_FW run-level 3 Oct 17 14:42 SPEC is set to: /home/cpu2017 Filesystem Type Size Used Avail Use% Mounted on /dev/sdb2 xfs 549G 85G 465G 16% / From /sys/devices/virtual/dmi/id BIOS: Cisco Systems, Inc. C480M5.4.0.3.32.0301190121 03/01/2019 Vendor: Cisco Product: UCSC-C480-M5 Serial: FCH2238W019 Additional information from dmidecode follows. WARNING: Use caution when you interpret this section. The 'dmidecode' program reads system data which is "intended to allow hardware to be accurately determined", but the intent may not be met, as there are frequent changes to hardware, firmware, and the "DMTF SMBIOS" standard. Memory: 48x 0xCE00 M393A4K40CB2-CVF 32 GB 2 rank 2933, configured at 2934 (End of data from sysinfo program) Compiler Version Notes ---------------------- ============================================================================== C | 500.perlbench_r(base) 502.gcc_r(base) 505.mcf_r(base) | 525.x264_r(base) 557.xz_r(base) ------------------------------------------------------------------------------ Intel(R) C Intel(R) 64 Compiler for applications running on Intel(R) 64, Version 19.0.4.227 Build 20190416 Copyright (C) 1985-2019 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== C++ | 520.omnetpp_r(base) 523.xalancbmk_r(base) 531.deepsjeng_r(base) | 541.leela_r(base) ------------------------------------------------------------------------------ Intel(R) C++ Intel(R) 64 Compiler for applications running on Intel(R) 64, Version 19.0.4.227 Build 20190416 Copyright (C) 1985-2019 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== Fortran | 548.exchange2_r(base) ------------------------------------------------------------------------------ Intel(R) Fortran Intel(R) 64 Compiler for applications running on Intel(R) 64, Version 19.0.4.227 Build 20190416 Copyright (C) 1985-2019 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ Base Compiler Invocation ------------------------ C benchmarks: icc -m64 -std=c11 C++ benchmarks: icpc -m64 Fortran benchmarks: ifort -m64 Base Portability Flags ---------------------- 500.perlbench_r: -DSPEC_LP64 -DSPEC_LINUX_X64 502.gcc_r: -DSPEC_LP64 505.mcf_r: -DSPEC_LP64 520.omnetpp_r: -DSPEC_LP64 523.xalancbmk_r: -DSPEC_LP64 -DSPEC_LINUX 525.x264_r: -DSPEC_LP64 531.deepsjeng_r: -DSPEC_LP64 541.leela_r: -DSPEC_LP64 548.exchange2_r: -DSPEC_LP64 557.xz_r: -DSPEC_LP64 Base Optimization Flags ----------------------- C benchmarks: -Wl,-z,muldefs -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=4 -L/usr/local/IntelCompiler19/compilers_and_libraries_2019.4.227/linux/compiler/lib/intel64 -lqkmalloc C++ benchmarks: -Wl,-z,muldefs -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=4 -L/usr/local/IntelCompiler19/compilers_and_libraries_2019.4.227/linux/compiler/lib/intel64 -lqkmalloc Fortran benchmarks: -Wl,-z,muldefs -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=4 -nostandard-realloc-lhs -align array32byte -L/usr/local/IntelCompiler19/compilers_and_libraries_2019.4.227/linux/compiler/lib/intel64 -lqkmalloc The flags files that were used to format this result can be browsed at http://www.spec.org/cpu2017/flags/Intel-ic19.0u1-official-linux64.2019-07-09.html http://www.spec.org/cpu2017/flags/Cisco-Platform-Settings-V1.2-revJ.html You can also download the XML flags sources by saving the following links: http://www.spec.org/cpu2017/flags/Intel-ic19.0u1-official-linux64.2019-07-09.xml http://www.spec.org/cpu2017/flags/Cisco-Platform-Settings-V1.2-revJ.xml SPEC CPU and SPECrate are registered trademarks of the Standard Performance Evaluation Corporation. All other brand and product names appearing in this result are trademarks or registered trademarks of their respective holders. ---------------------------------------------------------------------------------------------------------------------------------- For questions about this result, please contact the tester. For other inquiries, please contact info@spec.org. Copyright 2017-2020 Standard Performance Evaluation Corporation Tested with SPEC CPU(R)2017 v1.1.0 on 2019-10-17 17:51:17-0400. Report generated on 2020-07-23 15:58:15 by CPU2017 text formatter v6255. Originally published on 2019-11-25.