SPEC(R) CPU2017 Integer Rate Result Hewlett Packard Enterprise Synergy 480 Gen10 (2.60 GHz, Intel Xeon Gold 6240L) Test Sponsor: HPE CPU2017 License: 3 Test date: May-2019 Test sponsor: HPE Hardware availability: Apr-2019 Tested by: HPE Software availability: Feb-2019 Base Base Base Peak Peak Peak Benchmarks Copies Run Time Rate Copies Run Time Rate --------------- ------- --------- --------- ------- --------- --------- 500.perlbench_r 72 667 172 * 500.perlbench_r 72 666 172 S 500.perlbench_r 72 667 172 S 502.gcc_r 72 565 180 S 502.gcc_r 72 566 180 * 502.gcc_r 72 567 180 S 505.mcf_r 72 394 295 * 505.mcf_r 72 394 296 S 505.mcf_r 72 395 295 S 520.omnetpp_r 72 653 145 S 520.omnetpp_r 72 651 145 S 520.omnetpp_r 72 653 145 * 523.xalancbmk_r 72 309 246 S 523.xalancbmk_r 72 309 246 * 523.xalancbmk_r 72 309 246 S 525.x264_r 72 277 456 S 525.x264_r 72 274 459 S 525.x264_r 72 277 456 * 531.deepsjeng_r 72 441 187 S 531.deepsjeng_r 72 441 187 S 531.deepsjeng_r 72 441 187 * 541.leela_r 72 659 181 S 541.leela_r 72 661 180 S 541.leela_r 72 661 180 * 548.exchange2_r 72 469 403 S 548.exchange2_r 72 469 402 * 548.exchange2_r 72 470 402 S 557.xz_r 72 525 148 S 557.xz_r 72 526 148 * 557.xz_r 72 526 148 S ================================================================================= 500.perlbench_r 72 667 172 * 502.gcc_r 72 566 180 * 505.mcf_r 72 394 295 * 520.omnetpp_r 72 653 145 * 523.xalancbmk_r 72 309 246 * 525.x264_r 72 277 456 * 531.deepsjeng_r 72 441 187 * 541.leela_r 72 661 180 * 548.exchange2_r 72 469 402 * 557.xz_r 72 526 148 * SPECrate2017_int_base 223 SPECrate2017_int_peak Not Run HARDWARE -------- CPU Name: Intel Xeon Gold 6240L Max MHz.: 3900 Nominal: 2600 Enabled: 36 cores, 2 chips, 2 threads/core Orderable: 1, 2 chip(s) Cache L1: 32 KB I + 32 KB D on chip per core L2: 1 MB I+D on chip per core L3: 24.75 MB I+D on chip per chip Other: None Memory: 384 GB (24 x 16 GB 2Rx8 PC4-2933Y-R) Storage: 1 x 400 GB SAS SSD, RAID 0 Other: None SOFTWARE -------- OS: SUSE Linux Enterprise Server 15 (x86_64) Kernel 4.12.14-23-default Compiler: C/C++: Version 19.0.2.187 of Intel C/C++ Compiler Build 20190117 for Linux; Fortran: Version 19.0.2.187 of Intel Fortran Compiler Build 20190117 for Linux Parallel: No Firmware: HPE BIOS Version I42 02/02/2019 released Apr-2019 File System: btrfs System State: Run level 3 (multi-user) Base Pointers: 64-bit Peak Pointers: Not Applicable Other: None Submit Notes ------------ The numactl mechanism was used to bind copies to processors. The config file option 'submit' was used to generate numactl commands to bind each copy to a specific processor. For details, please see the config file. Operating System Notes ---------------------- Stack size set to unlimited using "ulimit -s unlimited" Transparent Huge Pages enabled by default Prior to runcpu invocation Filesystem page cache synced and cleared with: sync; echo 3 > /proc/sys/vm/drop_caches runcpu command invoked through numactl i.e.: numactl --interleave=all runcpu General Notes ------------- Environment variables set by runcpu before the start of the run: LD_LIBRARY_PATH = "/home/cpu2017_u2/lib/ia32:/home/cpu2017_u2/lib/intel64" Binaries compiled on a system with 1x Intel Core i9-7900X CPU + 32GB RAM memory using Redhat Enterprise Linux 7.5 NA: The test sponsor attests, as of date of publication, that CVE-2017-5754 (Meltdown) is mitigated in the system as tested and documented. Yes: The test sponsor attests, as of date of publication, that CVE-2017-5753 (Spectre variant 1) is mitigated in the system as tested and documented. Yes: The test sponsor attests, as of date of publication, that CVE-2017-5715 (Spectre variant 2) is mitigated in the system as tested and documented. Platform Notes -------------- BIOS Configuration: Thermal Configuration set to Maximum Cooling Memory Patrol Scrubbing set to Disabled LLC Prefetch set to Enabled LLC Dead Line Allocation set to Disabled Enhanced Processor Performance set to Enabled Workload Profile set to General Throughput Compute Workload Profile set to Custom Energy/Performance Bias set to Balanced Performance Sysinfo program /home/cpu2017_u2/bin/sysinfo Rev: r5974 of 2018-05-19 9bcde8f2999c33d61f64985e45859ea9 running on sy480g10-2 Thu May 30 03:58:42 2019 SUT (System Under Test) info as seen by some common utilities. For more information on this section, see https://www.spec.org/cpu2017/Docs/config.html#sysinfo From /proc/cpuinfo model name : Intel(R) Xeon(R) Gold 6240L CPU @ 2.60GHz 2 "physical id"s (chips) 72 "processors" cores, siblings (Caution: counting these is hw and system dependent. The following excerpts from /proc/cpuinfo might not be reliable. Use with caution.) cpu cores : 18 siblings : 36 physical 0: cores 0 1 2 3 8 9 10 11 16 17 18 19 20 24 25 26 27 physical 1: cores 0 1 2 3 8 9 10 11 16 17 18 19 20 24 25 26 27 From lscpu: Architecture: x86_64 CPU op-mode(s): 32-bit, 64-bit Byte Order: Little Endian CPU(s): 72 On-line CPU(s) list: 0-71 Thread(s) per core: 2 Core(s) per socket: 18 Socket(s): 2 NUMA node(s): 4 Vendor ID: GenuineIntel CPU family: 6 Model: 85 Model name: Intel(R) Xeon(R) Gold 6240L CPU @ 2.60GHz Stepping: 7 CPU MHz: 2600.000 BogoMIPS: 5200.00 Virtualization: VT-x L1d cache: 32K L1i cache: 32K L2 cache: 1024K L3 cache: 25344K NUMA node0 CPU(s): 0-8,36-44 NUMA node1 CPU(s): 9-17,45-53 NUMA node2 CPU(s): 18-26,54-62 NUMA node3 CPU(s): 27-35,63-71 Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc art arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc cpuid aperfmperf tsc_known_freq pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 sdbg fma cx16 xtpr pdcm pcid dca sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm abm 3dnowprefetch cpuid_fault epb cat_l3 cdp_l3 invpcid_single intel_ppin mba tpr_shadow vnmi flexpriority ept vpid fsgsbase tsc_adjust bmi1 hle avx2 smep bmi2 erms invpcid rtm cqm mpx rdt_a avx512f avx512dq rdseed adx smap clflushopt clwb intel_pt avx512cd avx512bw avx512vl xsaveopt xsavec xgetbv1 xsaves cqm_llc cqm_occup_llc cqm_mbm_total cqm_mbm_local ibpb ibrs stibp dtherm ida arat pln pts pku ospke avx512_vnni arch_capabilities ssbd /proc/cpuinfo cache data cache size : 25344 KB From numactl --hardware WARNING: a numactl 'node' might or might not correspond to a physical chip. available: 4 nodes (0-3) node 0 cpus: 0 1 2 3 4 5 6 7 8 36 37 38 39 40 41 42 43 44 node 0 size: 96278 MB node 0 free: 95881 MB node 1 cpus: 9 10 11 12 13 14 15 16 17 45 46 47 48 49 50 51 52 53 node 1 size: 96735 MB node 1 free: 96528 MB node 2 cpus: 18 19 20 21 22 23 24 25 26 54 55 56 57 58 59 60 61 62 node 2 size: 96764 MB node 2 free: 96629 MB node 3 cpus: 27 28 29 30 31 32 33 34 35 63 64 65 66 67 68 69 70 71 node 3 size: 96566 MB node 3 free: 96433 MB node distances: node 0 1 2 3 0: 10 21 31 31 1: 21 10 31 31 2: 31 31 10 21 3: 31 31 21 10 From /proc/meminfo MemTotal: 395617164 kB HugePages_Total: 0 Hugepagesize: 2048 kB From /etc/*release* /etc/*version* os-release: NAME="SLES" VERSION="15" VERSION_ID="15" PRETTY_NAME="SUSE Linux Enterprise Server 15" ID="sles" ID_LIKE="suse" ANSI_COLOR="0;32" CPE_NAME="cpe:/o:suse:sles:15" uname -a: Linux sy480g10-2 4.12.14-23-default #1 SMP Tue May 29 21:04:44 UTC 2018 (cd0437b) x86_64 x86_64 x86_64 GNU/Linux Kernel self-reported vulnerability status: CVE-2017-5754 (Meltdown): Not affected CVE-2017-5753 (Spectre variant 1): Mitigation: __user pointer sanitization CVE-2017-5715 (Spectre variant 2): Mitigation: Indirect Branch Restricted Speculation, IBPB, IBRS_FW run-level 3 May 30 03:56 SPEC is set to: /home/cpu2017_u2 Filesystem Type Size Used Avail Use% Mounted on /dev/sdb2 btrfs 371G 91G 279G 25% /home Additional information from dmidecode follows. WARNING: Use caution when you interpret this section. The 'dmidecode' program reads system data which is "intended to allow hardware to be accurately determined", but the intent may not be met, as there are frequent changes to hardware, firmware, and the "DMTF SMBIOS" standard. BIOS HPE I42 02/02/2019 Memory: 24x UNKNOWN NOT AVAILABLE 16 GB 2 rank 2933 (End of data from sysinfo program) Compiler Version Notes ---------------------- ============================================================================== CC 500.perlbench_r(base) 502.gcc_r(base) 505.mcf_r(base) 525.x264_r(base) 557.xz_r(base) ------------------------------------------------------------------------------ Intel(R) C Intel(R) 64 Compiler for applications running on Intel(R) 64, Version 19.0.2.187 Build 20190117 Copyright (C) 1985-2019 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== CXXC 520.omnetpp_r(base) 523.xalancbmk_r(base) 531.deepsjeng_r(base) 541.leela_r(base) ------------------------------------------------------------------------------ Intel(R) C++ Intel(R) 64 Compiler for applications running on Intel(R) 64, Version 19.0.2.187 Build 20190117 Copyright (C) 1985-2019 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== FC 548.exchange2_r(base) ------------------------------------------------------------------------------ Intel(R) Fortran Intel(R) 64 Compiler for applications running on Intel(R) 64, Version 19.0.2.187 Build 20190117 Copyright (C) 1985-2019 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ Base Compiler Invocation ------------------------ C benchmarks: icc -m64 -std=c11 C++ benchmarks: icpc -m64 Fortran benchmarks: ifort -m64 Base Portability Flags ---------------------- 500.perlbench_r: -DSPEC_LP64 -DSPEC_LINUX_X64 502.gcc_r: -DSPEC_LP64 505.mcf_r: -DSPEC_LP64 520.omnetpp_r: -DSPEC_LP64 523.xalancbmk_r: -DSPEC_LP64 -DSPEC_LINUX 525.x264_r: -DSPEC_LP64 531.deepsjeng_r: -DSPEC_LP64 541.leela_r: -DSPEC_LP64 548.exchange2_r: -DSPEC_LP64 557.xz_r: -DSPEC_LP64 Base Optimization Flags ----------------------- C benchmarks: -Wl,-z,muldefs -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=4 -L/usr/local/IntelCompiler19/compilers_and_libraries_2019.1.144/linux/compiler/lib/intel64 -lqkmalloc C++ benchmarks: -Wl,-z,muldefs -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=4 -L/usr/local/IntelCompiler19/compilers_and_libraries_2019.1.144/linux/compiler/lib/intel64 -lqkmalloc Fortran benchmarks: -Wl,-z,muldefs -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=4 -nostandard-realloc-lhs -align array32byte -L/usr/local/IntelCompiler19/compilers_and_libraries_2019.1.144/linux/compiler/lib/intel64 -lqkmalloc The flags files that were used to format this result can be browsed at http://www.spec.org/cpu2017/flags/HPE-ic19.0u1-flags-linux64.html http://www.spec.org/cpu2017/flags/HPE-Platform-Flags-Intel-V1.2-CLX-revB.html You can also download the XML flags sources by saving the following links: http://www.spec.org/cpu2017/flags/HPE-ic19.0u1-flags-linux64.xml http://www.spec.org/cpu2017/flags/HPE-Platform-Flags-Intel-V1.2-CLX-revB.xml SPEC is a registered trademark of the Standard Performance Evaluation Corporation. All other brand and product names appearing in this result are trademarks or registered trademarks of their respective holders. ---------------------------------------------------------------------------------------------------- For questions about this result, please contact the tester. For other inquiries, please contact info@spec.org. Copyright 2017-2019 Standard Performance Evaluation Corporation Tested with SPEC CPU2017 v1.0.5 on 2019-05-30 04:58:41-0400. Report generated on 2019-07-22 11:42:00 by CPU2017 ASCII formatter v6067. Originally published on 2019-07-21.