SPEC® CINT2006 Result

Cisco Systems

Cisco UCS B230 M1 (Intel Xeon L7555, 1.87 GHz)

Hardware
CPU Name:	Intel Xeon L7555
CPU Characteristics:	Intel Turbo Boost Technology up to 2.53 GHz
CPU MHz:	1867
FPU:	Integrated
CPU(s) enabled:	16 cores, 2 chips, 8 cores/chip, 2 threads/core
CPU(s) orderable:	1,2 chips
Primary Cache:	32 KB I + 32 KB D on chip per core
Secondary Cache:	256 KB I+D on chip per core
L3 Cache:	24 MB I+D on chip per chip
Other Cache:	None
Memory:	128 GB (32 x 4 GB 2Rx4 PC3L-10600R-9, ECC)
Disk Subsystem:	64 GB SSD, SATA Gen2, 3Gb/s
Other Hardware:	None

Software
Operating System:	SuSe Linux Enterprise Server 11 (x86_64), Kernel 2.6.27-19-5-default
Compiler:	Intel C++ Professional Compiler for IA32 and Intel 64, Version 11.1 Build 20091130 Package ID: l_cproc_p_11.1.064
Auto Parallel:	No
File System:	ext3
System State:	Run level 3 (multi-user)
Base Pointers:	32-bit
Peak Pointers:	32/64-bit
Other Software:	MicroQuill SmartHeap Library V8.1

Results Table

Benchmark	Base							Peak
Benchmark	Copies	Seconds	Ratio	Seconds	Ratio	Seconds	Ratio	Copies	Seconds	Ratio	Seconds	Ratio	Seconds	Ratio
Results appear in the order in which they were run. Bold underlined text indicates a median measurement.
400.perlbench	32	1226	255	1204	260	1204	260	32	1018	307	1026	305	1028	304
401.bzip2	32	1558	198	1554	199	1558	198	32	1474	210	1473	210	1471	210
403.gcc	32	1038	248	1065	242	1038	248	32	1052	245	1044	247	1040	248
429.mcf	32	795	367	780	374	797	366	32	783	373	781	374	788	370
445.gobmk	32	1104	304	1102	305	1105	304	32	1013	331	1014	331	1014	331
456.hmmer	32	702	426	700	426	702	425	32	565	529	561	532	562	532
458.sjeng	32	1391	278	1392	278	1389	279	32	1261	307	1263	306	1261	307
462.libquantum	32	880	754	883	751	865	767	32	864	767	862	769	864	768
464.h264ref	32	1741	407	1771	400	1775	399	32	1761	402	1708	415	1759	403
471.omnetpp	32	926	216	925	216	925	216	32	845	237	845	237	846	236
473.astar	32	1187	189	1184	190	1168	192	32	1052	214	1052	214	1053	213
483.xalancbmk	32	653	338	656	337	653	338	32	653	338	656	337	653	338

The config file option 'submit' was used.
 numactl was used to bind copies to the cores

ulimit -s unlimited was used to set the stacksize to unlimited prior to run

Binaries were compiled on SLES 10 with Binutils 2.18.50.0.7.20080502

icc -m32

icpc -m32

-xSSE4.2 -ipo -O3 -no-prec-div -static -opt-prefetch

403.gcc:

	icpc -m32
473.astar:	icpc -m64

400.perlbench:	-xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -static(pass 2) -prof-use(pass 2) -ansi-alias
401.bzip2:	-xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -static(pass 2) -prof-use(pass 2) -opt-prefetch -ansi-alias -auto-ilp32
403.gcc:	-xSSE4.2 -ipo -O3 -no-prec-div -static
429.mcf:	-xSSE4.2 -ipo -O3 -no-prec-div -static -opt-prefetch
445.gobmk:	-xSSE4.2(pass 2) -prof-gen(pass 1) -prof-use(pass 2) -O2 -ipo -no-prec-div -ansi-alias
456.hmmer:	-xSSE4.2 -ipo -O3 -no-prec-div -static -unroll2 -ansi-alias -auto-ilp32
458.sjeng:	-xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -static(pass 2) -prof-use(pass 2) -unroll4 -auto-ilp32
462.libquantum:	-xSSE4.2 -ipo -O3 -no-prec-div -static -auto-ilp32 -opt-prefetch
464.h264ref:	-xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -static(pass 2) -prof-use(pass 2) -unroll2 -ansi-alias

471.omnetpp:	-xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -prof-use(pass 2) -ansi-alias -opt-ra-region-strategy=block -Wl,-z,muldefs -L/home/cmplr/usr3/alrahate/cpu2006.1.1.ic11.1/libic11.1-32bit -lsmartheap
473.astar:	-xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -prof-use(pass 2) -ansi-alias -opt-ra-region-strategy=routine -Wl,-z,muldefs -L/home/cmplr/usr3/alrahate/cpu2006.1.1.ic11.1/libic11.1-64bit -lsmartheap64
483.xalancbmk:	basepeak = yes

403.gcc:

You can also download the XML flags source by saving the following link:
http://www.spec.org/cpu2006/flags/Intel-ic11.1-linux64-revE.20100316.xml.