SPEC® CINT2006 Result

Dell Inc.

PowerEdge M610 (Intel Xeon X5680, 3.33 GHz)

Hardware
CPU Name:	Intel Xeon X5680
CPU Characteristics:	Intel Turbo Boost Technology up to 3.60 GHz
CPU MHz:	3333
FPU:	Integrated
CPU(s) enabled:	12 cores, 2 chips, 6 cores/chip, 2 threads/core
CPU(s) orderable:	1,2 chips
Primary Cache:	32 KB I + 32 KB D on chip per core
Secondary Cache:	256 KB I+D on chip per core
L3 Cache:	12 MB I+D on chip per chip
Other Cache:	None
Memory:	48 GB (12 x 4 GB 2Rx4 PC3-10600R-9, ECC)
Disk Subsystem:	1 x 146 GB 15000 RPM SAS
Other Hardware:	None

Software
Operating System:	SUSE Linux Enterprise Server 11 (x86_64), Kernel 2.6.27.19-5-smp
Compiler:	Intel C++ Professional Compiler for IA32 and Intel 64, Version 11.1 Build 20091130 Package ID: l_cproc_p_11.1.064
Auto Parallel:	No
File System:	ext3
System State:	Run level 3 (multi-user)
Base Pointers:	32-bit
Peak Pointers:	32/64-bit
Other Software:	Microquill SmartHeap V8.1

Results Table

Benchmark	Base							Peak
Benchmark	Copies	Seconds	Ratio	Seconds	Ratio	Seconds	Ratio	Copies	Seconds	Ratio	Seconds	Ratio	Seconds	Ratio
Results appear in the order in which they were run. Bold underlined text indicates a median measurement.
400.perlbench	24	675	347	686	342	676	347	24	654	359	577	407	578	406
401.bzip2	24	1041	223	998	232	997	232	24	978	237	959	242	959	241
403.gcc	24	711	272	727	266	718	269	24	716	270	719	269	716	270
429.mcf	24	719	304	712	307	716	306	12	288	380	287	381	288	380
445.gobmk	24	642	392	636	396	638	394	24	596	423	591	426	588	428
456.hmmer	24	451	497	450	498	451	497	12	207	541	197	567	199	563
458.sjeng	24	797	365	792	367	793	366	24	721	403	722	402	722	402
462.libquantum	24	627	793	626	795	625	796	24	627	793	626	795	625	796
464.h264ref	24	1022	519	1073	495	1042	510	24	1031	515	1034	514	1028	517
471.omnetpp	24	652	230	652	230	652	230	24	634	237	633	237	634	237
473.astar	24	749	225	765	220	761	221	24	720	234	719	234	719	234
483.xalancbmk	24	484	342	445	372	444	373	24	484	342	445	372	444	373

The config file option 'submit' was used.
 numactl was used to bind copies to the cores

'ulimit -s unlimited' was used to set the stacksize to unlimited prior to run

 BIOS Settings:
 Power Management = Maximum Performance (Default = Active Power Controller)
 Data Reuse = Disabled (Default = Enabled)

 Binaries were compiled on SLES 10 with Binutils 2.18.50.0.7.20080502

icc -m32

icpc -m32

-xSSE4.2 -ipo -O3 -no-prec-div -static -opt-prefetch

403.gcc:

	icpc -m32
473.astar:	icpc -m64

400.perlbench:	-xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -static(pass 2) -prof-use(pass 2) -ansi-alias
401.bzip2:	-xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -static(pass 2) -prof-use(pass 2) -opt-prefetch -ansi-alias -auto-ilp32
403.gcc:	-xSSE4.2 -ipo -O3 -no-prec-div -static
429.mcf:	-xSSE4.2 -ipo -O3 -no-prec-div -static -opt-prefetch
445.gobmk:	-xSSE4.2(pass 2) -prof-gen(pass 1) -prof-use(pass 2) -O2 -ipo -no-prec-div -ansi-alias
456.hmmer:	-xSSE4.2 -ipo -O3 -no-prec-div -static -unroll2 -ansi-alias -auto-ilp32
458.sjeng:	-xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -static(pass 2) -prof-use(pass 2) -unroll4 -auto-ilp32
462.libquantum:	basepeak = yes
464.h264ref:	-xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -static(pass 2) -prof-use(pass 2) -unroll2 -ansi-alias

471.omnetpp:	-xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -prof-use(pass 2) -ansi-alias -opt-ra-region-strategy=block -Wl,-z,muldefs -L/home/cmplr/usr3/alrahate/cpu2006.1.1.ic11.1/libic11.1-32bit -lsmartheap
473.astar:	-xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -prof-use(pass 2) -ansi-alias -opt-ra-region-strategy=routine -Wl,-z,muldefs -L/home/cmplr/usr3/alrahate/cpu2006.1.1.ic11.1/libic11.1-64bit -lsmartheap64
483.xalancbmk:	basepeak = yes

403.gcc:

You can also download the XML flags source by saving the following link:
http://www.spec.org/cpu2006/flags/Intel-ic11.1-linux64-revE.20100330.xml.