SPEC® CINT2006 Result

Copyright 2006-2014 Standard Performance Evaluation Corporation

IBM Corporation

IBM System x3200 M2 (Intel Xeon E3110)

CPU2006 license: 11 Test date: Jul-2008
Test sponsor: IBM Corporation Hardware Availability: Sep-2008
Tested by: IBM Corporation Software Availability: Nov-2007
Benchmark results graph
Hardware
CPU Name: Intel Xeon E3110
CPU Characteristics: 1333MHz system bus
CPU MHz: 3000
FPU: Integrated
CPU(s) enabled: 2 cores, 1 chip, 2 cores/chip
CPU(s) orderable: 1 chip
Primary Cache: 32 KB I + 32 KB D on chip per core
Secondary Cache: 6 MB I+D on chip per chip
L3 Cache: None
Other Cache: None
Memory: 8 GB (4 x 2 GB DDR2-6400E ECC)
Disk Subsystem: 1 x 160 GB SATA, 7200RPM
Other Hardware: None
Software
Operating System: SuSE Linux Enterprise Server 10 (x86_64) SP1,
Kernel 2.6.16.46-0.12-smp
Compiler: Intel C++ Compiler 10.1 for Linux
Build 20070913 Package ID: l_cc_p_10.1.008
Auto Parallel: Yes
File System: ReiserFS
System State: Run level 3 (Full multiuser with network)
Base Pointers: 32-bit
Peak Pointers: 32/64-bit
Other Software: MicroQuill SmartHeap 8.1
Binutils 2.17.50.0.15

Results Table

Benchmark Base Peak
Copies Seconds Ratio Seconds Ratio Seconds Ratio Copies Seconds Ratio Seconds Ratio Seconds Ratio
Results appear in the order in which they were run. Bold underlined text indicates a median measurement.
400.perlbench 2 496 39.4 494 39.5 493 39.6 2 412 47.4 410 47.7 410 47.6
401.bzip2 2 621 31.1 619 31.2 631 30.6 2 582 33.2 582 33.2 580 33.3
403.gcc 2 439 36.7 437 36.9 429 37.5 2 432 37.2 428 37.6 432 37.3
429.mcf 2 436 41.9 435 41.9 437 41.7 2 443 41.2 442 41.3 442 41.3
445.gobmk 2 526 39.9 526 39.9 526 39.9 2 484 43.4 484 43.3 484 43.4
456.hmmer 2 588 31.7 589 31.7 588 31.8 2 341 54.8 340 54.8 340 55.0
458.sjeng 2 673 35.9 672 36.0 667 36.3 2 598 40.5 598 40.5 597 40.6
462.libquantum 2 1339 30.9 1333 31.1 1352 30.7 1 324 63.9 325 63.8 325 63.8
464.h264ref 2 696 63.6 696 63.6 696 63.6 2 666 66.4 666 66.4 667 66.4
471.omnetpp 2 441 28.3 441 28.3 441 28.3 2 407 30.7 407 30.7 407 30.7
473.astar 2 526 26.7 528 26.6 524 26.8 2 480 29.3 479 29.3 479 29.3
483.xalancbmk 2 302 45.8 302 45.8 302 45.8 2 302 45.8 302 45.8 302 45.8

General Notes

 All benchmarks compiled in 32-bit mode except 401.bzip2 and 456.hmmer,
 for peak, are compiled in 64-bit mode
 Hardware Sector Prefetch Enabled and Adjacent Sector Prefetch Enabled
 OMP_NUM_THREADS set to number of cores
 KMP_AFFINITY set to physical,0
 KMP_STACKSIZE set to null
 taskset utility used to bind CPU(s) to processes

Base Compiler Invocation

C benchmarks:

 icc 

C++ benchmarks:

 icpc 

Base Portability Flags

400.perlbench:  -DSPEC_CPU_LINUX_IA32 
462.libquantum:  -DSPEC_CPU_LINUX 
483.xalancbmk:  -DSPEC_CPU_LINUX 

Base Optimization Flags

C benchmarks:

 -fast   -inline-calloc   -opt-malloc-options=3 

C++ benchmarks:

 -xT   -ipo   -O3   -no-prec-div   -Wl,-z,muldefs   -L/spec/users/rahul/cpu2006.1.0/lib -lsmartheap 

Base Other Flags

C benchmarks:

403.gcc:  -Dalloca=_alloca 

Peak Compiler Invocation

C benchmarks (except as noted below):

 icc 
401.bzip2:  /opt/intel/cce/10.1.008/bin/icc   -L/opt/intel/cce/10.1.008/lib   -I/opt/intel/cce/10.1.008/include 
456.hmmer:  /opt/intel/cce/10.1.008/bin/icc   -L/opt/intel/cce/10.1.008/lib   -I/opt/intel/cce/10.1.008/include 

C++ benchmarks:

 icpc 

Peak Portability Flags

400.perlbench:  -DSPEC_CPU_LINUX_IA32 
401.bzip2:  -DSPEC_CPU_LP64 
456.hmmer:  -DSPEC_CPU_LP64 
462.libquantum:  -DSPEC_CPU_LINUX 
483.xalancbmk:  -DSPEC_CPU_LINUX 

Peak Optimization Flags

C benchmarks:

400.perlbench:  -prof-gen(pass 1)   -prof-use(pass 2)   -fast   -ansi-alias   -prefetch 
401.bzip2:  -prof-gen(pass 1)   -prof-use(pass 2)   -fast   -prefetch 
403.gcc:  -fast   -inline-calloc   -opt-malloc-options=3 
429.mcf:  -fast   -prefetch 
445.gobmk:  -prof-gen(pass 1)   -prof-use(pass 2)   -xT   -O2   -ipo   -no-prec-div   -ansi-alias 
456.hmmer:  -fast   -unroll2   -ansi-alias   -opt-multi-version-aggressive 
458.sjeng:  -prof-gen(pass 1)   -prof-use(pass 2)   -fast   -unroll4 
462.libquantum:  -fast   -unroll4   -Ob0   -prefetch   -opt-streaming-stores always   -vec-guard-write   -opt-malloc-options=3   -parallel   -par-runtime-control 
464.h264ref:  -prof-gen(pass 1)   -prof-use(pass 2)   -fast   -unroll2   -ansi-alias 

C++ benchmarks:

471.omnetpp:  -prof-gen(pass 1)   -prof-use(pass 2)   -xT   -O3   -ipo   -no-prec-div   -ansi-alias   -opt-ra-region-strategy=block   -Wl,-z,muldefs   -L/spec/users/rahul/cpu2006.1.0/lib -lsmartheap 
473.astar:  -prof-gen(pass 1)   -prof-use(pass 2)   -xT   -O3   -ipo   -no-prec-div   -ansi-alias   -opt-ra-region-strategy=routine   -Wl,-z,muldefs   -L/spec/users/rahul/cpu2006.1.0/lib -lsmartheap 
483.xalancbmk:  basepeak = yes 

Peak Other Flags

C benchmarks:

403.gcc:  -Dalloca=_alloca 

The flags file that was used to format this result can be browsed at
http://www.spec.org/cpu2006/flags/Intel-ic10.1-int-linux64-revC.20090713.html.

You can also download the XML flags source by saving the following link:
http://www.spec.org/cpu2006/flags/Intel-ic10.1-int-linux64-revC.20090713.xml.

SPEC and SPECint are registered trademarks of the Standard Performance Evaluation Corporation. All other brand and product names appearing in this result are trademarks or registered trademarks of their respective holders.

For questions about this result, please contact the tester.
For other inquiries, please contact [email protected]
Copyright 2006-2014 Standard Performance Evaluation Corporation
Tested with SPEC CPU2006 v1.0.
Report generated on Tue Jul 22 19:13:52 2014 by SPEC CPU2006 HTML formatter v6932.
Originally published on 2 September 2008.