SPEC CPU2006 Flag Description for NEC Server Platform

Firmware / BIOS / Microcode Settings

Memory RAS Mode:

The server has RAS feature including "Independent", "Independent + Rank Sparing", "Independent + Mirroring", "Independent + Addr Mirroring", "Lock Step, "Lock Step + Rank Sparing", "Lock Step + Mirroring", "Lock Step + Addr Mirroring", and "Memory Scrubbing" modes.

• Independent: In "Independent" mode, the four memory channels operate independently. It supports ECC correction (64-Bit Data + 8-Bit ECC) and SDDC (Single Device Data Correction) that corrects an error to a single DRAM. Memory performance is higher than LockStep mode, however, RAS feature is rather poor.
• Independent + Rank Sparing: In "Independent + Rank Sparing" mode, spare ranks are added to Independent mode. If the indication of failure is detected in running rank, replace the data by copying it onto spare rank on the same channel to continue processing. RAS feature is higher than Independent mode, however, the memory capacity available for OS is reduced by the amount of memory used for spare rank from the installed memory.
• Independent + Mirroring: In "Independent + Mirroring" mode, mirroring memory is added to Independent mode, and regularly copies the contents of memory onto mirroring memory. If the memory error is detected, the mirroring memory takes over to continue processing. RAS feature is higher than Independent mode and "Independent + Rank Sparing" mode, however, the memory capacity available for OS is reduced to half of installed memory capacity.
• Independent + Addr Mirroring: In Independent + Addr Mirroring mode, mirroring memory is added to Independent mode, and regularly copies the contents of Linux kernel area (less than 4GB) onto mirroring memory. If the memory error is detected, the server continues processing by correcting the memory error using the mirrored information. Memory efficiency is higher than Independent + Mirroring mode, however, RAS feature is rather poor.
• Lock Step: In "Lock Step" mode, pairs of memory channel 0 and 1 or memory channel 2 and 3 are used to perform 128-bit data access. It supports ECC correction (128-bit Data + 16-Bit ECC) and DDDC (Double Device Data Correction) that can correct double DRAM errors. Memory performance is lower than Independent mode, however, RAS feature is higher than Independent mode.
• Lock Step + Rank Sparing: In "Lock Step + Rank Sparing" mode, spare ranks are added to Lock Step mode. If the indication of failure is detected in running rank, replace the data in unit of Lock Step PAIR by copying it onto spare rank on the same channel to continue processing. RAS feature is higher than Lock Step mode, however, the memory capacity available for OS is reduced by the capacity of spare rank from the installed memory.
• LockStep + Mirroring: In "LockStep + Mirroring" mode, mirroring memory is added to Lock Step mode, and regularly copies the contents of memory onto mirroring memory. If the memory error is detected, the mirroring memory takes over to continue processing. Mirroring is performed between SMI channels in memory controller, as shown in the figure below. In principle, the SMI channel having younger number (SMI0) is defined as duplication origin. RAS feature is higher than LockStep mode and "LockStep + Rank Sparing" mode, however, the memory capacity available for OS is reduced to half of installed memory capacity.
• LockStep + Addr Mirroring: In LockStep + Addr Mirroring mode, mirroring memory is added to Lock Step mode, and regularly copies the contents of Linux kernel area (less than 4GB) onto mirroring memory. If the memory error is detected, the server continues processing by correcting the memory error using the mirrored information. Memory efficiency is higher than LockStep + Mirroring mode, however, RAS feature is rather poor.

VT-x:

Enable or disable Intel(R) VT-x which is the processor virtualization feature. This item is displayed only when the installed processor supports this feature. This option is inaccessible when Intel TXT Support is set to Enabled. Disabled: Disables the feature. Enabled : Enables the feature.

Processor C6 Report:

Enable or disable the feature to transfer C6 State by OS. Disabled: Disables the feature. Enabled : Trasnfer to C6 State (Deep Power Down: Stop power supply except for SRAM) according to CPU load status, and reduce the energy consumption while retaining the optimum performance.

OS Performance Tuning:

Allow or disallow the performance tuning by OS. Disabled: Disables the feature. Enabled : Enables the feature.

Energy Performance:

Specify the priority of operation of processor, performance or power saving. This option is displayed only when OS Performance Tuning is set to Disabled.

• Performance: Performance is preferred.
• Balanced Performance: Performance and power-saving are well-balanced. Performance is preferred rather than Balanced Energy.
• Balanced Energy: Performance and power-saving are well-balanced. Power-saving is preferred rather than Balanced Performance.
• Energy Efficient: Power saving is highest priority.

Patrol Scrub:

Enable or disable the patrol scrubbing feature. Disabled: Disables the feature. Enabled : Accesses the memory periodically. If a correctable error is detected, correct an error, and write back the corrected data to memory to recover the data.

Demand Scrub:

Enable or disable the demand scrubbing feature. Disabled: Disables the feature. Enabled : If a correctable error is detected by memory access request in normal processing, correct an error, and write back the corrected data to memory to recover the data.

Memory P.E. Retry:

Enable or disable the DDR4 CMD/ADDR parity error retry feature. Disabled: Disables the feature. Enabled : When a command or address parity error occurs on a read, drops the transaction. Then the Memory Controller will retry all transactions blocked, and if successful system continues. When enabled a 1 cycle latency is added for the parity checking.

Cluster on Die :

Enable or disable the Cluster on Die feature. Disabled: Disables the feature. Enabled : Cluster-on-Die (COD) is a performance enhancing feature where the socket operates with two Caching Agents. COD is achieved by partitioning the cores/LLC slices within a die into 2 equal clusters (cluster 0 and cluster 1), where each cluster contains an independent caching agent. The cluster partitioning is done on a proximity basis such that an MLC miss from a core traverses to one of its nearby neighbors to have its request serviced, rather than potentially traveling to the farthest LLC slice in the die. In COD mode the system is expected to be set-up in a NUMA configuration where most memory accesses from a cluster will target the home agent associated with the cluster. The reduction in LLC latencies due to shorter ring stop hops can result in increased performance for some workloads.

Hyper-Threading:

Enable or disable the Intel(R) Hyper-Threading technology. This item is displayed only when the installed processor supports this feature. Disabled: Disables the feature. Enabled : Two threads words by a single processor core. The number of processors doubles the number of processor cores.