SPEC Seal of Reviewal CINT2000 Result
Copyright © 1999-2007 Standard Performance Evaluation Corporation
Hewlett-Packard Company
ProLiant DL380 G5 (2.66 GHz, Intel Xeon processor X5355)
SPECint_rate2000 = 105    
SPECint_rate_base2000 = 104    
SPEC license # 3 Tested by: Hewlett-Packard Company Test date: Feb-2007 Hardware Avail: Jan-2007 Software Avail: Nov-2006
Graph Scale Benchmark Base
Copies		 Base
Runtime		 Base
Ratio		 Copies Runtime Ratio
164.gzip base result bar (73.8)
164.gzip peak result bar (73.7)		 164.gzip 4 88.1  73.8   4 88.2  73.7  
175.vpr base result bar (76.2)
175.vpr peak result bar (77.5)		 175.vpr 4 85.2  76.2   4 83.9  77.5  
176.gcc base result bar (96.5)
176.gcc peak result bar (96.5)		 176.gcc 4 52.9  96.5   4 52.9  96.5  
181.mcf base result bar (83.4)
181.mcf peak result bar (84.9)		 181.mcf 4 100    83.4   4 98.4  84.9  
186.crafty base result bar (113)
186.crafty peak result bar (112)		 186.crafty 4 41.2  113     4 41.3  112    
197.parser base result bar (89.1)
197.parser peak result bar (89.6)		 197.parser 4 93.7  89.1   4 93.2  89.6  
252.eon base result bar (160)
252.eon peak result bar (161)		 252.eon 4 37.8  160     4 37.6  161    
253.perlbmk base result bar (142)
253.perlbmk peak result bar (143)		 253.perlbmk 4 58.8  142     4 58.6  143    
254.gap base result bar (83.6)
254.gap peak result bar (84.9)		 254.gap 4 61.0  83.6   4 60.1  84.9  
255.vortex base result bar (176)
255.vortex peak result bar (175)		 255.vortex 4 50.1  176     4 50.2  175    
256.bzip2 base result bar (77.5)
256.bzip2 peak result bar (77.5)		 256.bzip2 4 89.8  77.5   4 89.8  77.5  
300.twolf base result bar (144)
300.twolf peak result bar (144)		 300.twolf 4 96.9  144     4 96.9  144    
  SPECint_rate_base2000 104      
  SPECint_rate2000 105    

Hardware
Hardware Vendor: Hewlett-Packard Company
Model Name: ProLiant DL380 G5 (2.66 GHz, Intel Xeon processor X5355)
CPU: Intel Xeon processor X5355 (2.66 GHz, 2x4 MB L2 shared, 1333 MHz bus)
CPU MHz: 2666
FPU: Integrated
CPU(s) enabled: 4 cores, 1 chip, 4 cores/chip
CPU(s) orderable: 1,2 chips
Parallel: No
Primary Cache: 32 KB I + 32 KB D on chip per core
Secondary Cache: 8 MB I+D on chip per chip (4 MB shared per 2 cores)
L3 Cache: N/A
Other Cache: N/A
Memory: 16 GB (8x2 GB PC2-5300F CL5)
Disk Subsystem: 4x36 GB 10 K SAS
Other Hardware:
Software
Operating System: Windows Server 2003 Enterprise X64 Edition SP1
Compiler: Intel C++ Compiler for 32-bit applications,
(Version 9.1 Build 20061103Z)
Microsoft Visual Studio .NET 2003 (v7.1.3088, for libraries)
MicroQuill Smartheap Library 8.0
File System: NTFS
System State: Default
Notes / Tuning Information 
 +FDO: PASS1=-Qprof_gen  PASS2=-Qprof_use

 Base tuning for C programs:   -fast         +FDO  ONESTEP=yes shlw32M.lib
 Base tuning for C++ programs: -fast -Qcxx_features +FDO  ONESTEP=yes
 Portability flags:
   176.gcc: -Dalloca=_alloca /F10000000 
   186.crafty: -DNT_i386
   253.perlbmk: -DSPEC_CPU2000_NTOS -DPERLDLL /MT
   254.gap: -DSYS_HAS_CALLOC_PROTO -DSYS_HAS_MALLOC_PROTO
 Peak tuning:
   164.gzip:     -fast               +FDO  ONESTEP=yes 
   175.vpr:      -fast               +FDO  ONESTEP=yes
   176.gcc:      basepeak=1
   181.mcf:      -fast               +FDO  
   186.crafty:   -fast -Oa           +FDO  ONESTEP=yes shlw32M.lib 
   197.parser:   -fast               +FDO  ONESTEP=yes
   252.eon:      -fast               +FDO
   253.perlbmk:  -fast -Oa           +FDO  ONESTEP=yes shlw32M.lib
   254.gap:      -fast               +FDO  ONESTEP=yes
   255.vortex:   -fast               +FDO  ONESTEP=yes shlw32M.lib
   256.bzip2:    basepeak=1
   300.twolf:    -fast               +FDO              shlw32M.lib
 BIOS Configuration Notes
   Power Regulator set to Static High Performance Mode
   Adjacent Sector Prefetch disabled
 Other Configuration Notes
   The start /b /wait /affinity command is used to bind CPU(s) to processes.

For questions about this result, please contact the tester.
For other inquiries, please contact [email protected]
Copyright © 1999-2007 Standard Performance Evaluation Corporation

First published at SPEC.org on 06-Mar-2007

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