SPEC Seal of Reviewal CINT2000 Result
Copyright © 1999-2007 Standard Performance Evaluation Corporation
Itautec
Servidor Itautec ZX440 (Intel Xeon 7110M processor)
SPECint_rate2000 = 107    
SPECint_rate_base2000 = 107    
SPEC license # 9001 Tested by: Itautec Test date: Dec-2006 Hardware Avail: Jul-2006 Software Avail: May-2006
Graph Scale Benchmark Base
Copies		 Base
Runtime		 Base
Ratio		 Copies Runtime Ratio
164.gzip base result bar (100)
164.gzip peak result bar (100)		 164.gzip 16 259    100     16 259    100    
175.vpr base result bar (68.1)
175.vpr peak result bar (68.1)		 175.vpr 16 381    68.1   16 381    68.1  
176.gcc base result bar (143)
176.gcc peak result bar (143)		 176.gcc 16 143    143     16 143    143    
181.mcf base result bar (56.4)
181.mcf peak result bar (56.4)		 181.mcf 16 592    56.4   16 592    56.4  
186.crafty base result bar (87.0)
186.crafty peak result bar (87.0)		 186.crafty 16 213    87.0   16 213    87.0  
197.parser base result bar (107)
197.parser peak result bar (107)		 197.parser 16 313    107     16 313    107    
252.eon base result bar (174)
252.eon peak result bar (174)		 252.eon 16 139    174     16 139    174    
253.perlbmk base result bar (123)
253.perlbmk peak result bar (123)		 253.perlbmk 16 271    123     16 271    123    
254.gap base result bar (111)
254.gap peak result bar (111)		 254.gap 16 183    111     16 183    111    
255.vortex base result bar (177)
255.vortex peak result bar (177)		 255.vortex 16 199    177     16 199    177    
256.bzip2 base result bar (87.3)
256.bzip2 peak result bar (87.3)		 256.bzip2 16 319    87.3   16 319    87.3  
300.twolf base result bar (116)
300.twolf peak result bar (116)		 300.twolf 16 480    116     16 480    116    
  SPECint_rate_base2000 107      
  SPECint_rate2000 107    

Hardware
Hardware Vendor: Itautec
Model Name: Servidor Itautec ZX440 (Intel Xeon 7110M processor)
CPU: Intel Xeon 7110M processor (2.60 GHz, 2x1MB L2, 4MB L3, 800 MHz system bus)
CPU MHz: 2600
FPU: Integrated
CPU(s) enabled: 8 cores, 4 chips, 2 cores/chip (Hyper-Threading Technology enabled)
CPU(s) orderable: 1,2,3,4
Parallel: No
Primary Cache: 12k(I) micro-ops + 16KB(D) on chip, per core
Secondary Cache: 1024KB(I+D) on chip, per core
L3 Cache: 4MB on chip, per chip
Other Cache: N/A
Memory: 16x1GB DDR2-RAM PC2-3200R (CAS 3-3-3)
Disk Subsystem: 1 x 36GB SCSI 10000RPM
Other Hardware: None
Software
Operating System: Windows Server 2003 Enterprise Edition + SP1 (32-bit)
Compiler: Intel C++ Compiler 9.1
Build 20060519Z (for 32-bit applications),
Microsoft Visual Studio .NET 7.0.9466 (for libraries)
Microquill SmartHeap Library v.8.0 for SMP
File System: NTFS
System State: Default
Notes / Tuning Information 
    176.gcc:     -Dalloca=_alloca /F10000000
    186.crafy:   -DNT_i386
    253.perlbmk: -DSPEC_CPU2000_NTOS -DPERLDLL /MT
    254.gap:     -DSYS_HAS_CALLOC_PROTO -DSYS_HAS_MALLOC_PROTO
 GENERAL
+FDO: PASS1=-Qprof_gen  PASS2=-Qprof_use
 

 Base tuning flags
    for C programs:   -fast +FDO shlSMPMt.lib
    for C++ programs: -fast -Qcxx_features +FDO shlSMPMt.lib
 
 EXTRA LIBRARIES
   MicroQuill SmartHeap Library v.8.0 for SMP
   http://www.microquill.com
   
   Bios Settings:
   Hardware Prefetch enabled:
   prefetch data in order to shorten execution cycles and maximize 
   data processing efficiency.
   
   Snoop Filter enabled:
   Preserves cache coherency while minimizing snoops to remote nodes.
   
   Memory Array set to High-Performance Memory Array:
   Memory is up to 4-way interleaved (Memory RAID disabled).

For questions about this result, please contact the tester.
For other inquiries, please contact [email protected]
Copyright © 1999-2007 Standard Performance Evaluation Corporation

First published at SPEC.org on 10-Jan-2007

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