SPEC Seal of Reviewal CINT2000 Result
Copyright © 1999-2005 Standard Performance Evaluation Corporation
IBM Corporation
IBM System p5 550 (1900 MHz, 4 CPU)
SPECint_rate2000 = 78.5  
SPECint_rate_base2000 = 77.1  
SPEC license # 11 Tested by: IBM Test date: Sep-2005 Hardware Avail: Oct-2005 Software Avail: Oct-2005
Graph Scale Benchmark Base
Copies		 Base
Runtime		 Base
Ratio		 Copies Runtime Ratio
164.gzip base result bar (52.5)
164.gzip peak result bar (52.5)		 164.gzip 8 247    52.5   8 247    52.5  
175.vpr base result bar (66.0)
175.vpr peak result bar (65.8)		 175.vpr 8 197    66.0   8 197    65.8  
176.gcc base result bar (84.2)
176.gcc peak result bar (83.1)		 176.gcc 8 121    84.2   8 123    83.1  
181.mcf base result bar (111)
181.mcf peak result bar (112)		 181.mcf 8 151    111     8 149    112    
186.crafty base result bar (59.7)
186.crafty peak result bar (59.7)		 186.crafty 8 155    59.7   8 155    59.7  
197.parser base result bar (75.1)
197.parser peak result bar (75.2)		 197.parser 8 222    75.1   8 222    75.2  
252.eon base result bar (87.4)
252.eon peak result bar (90.7)		 252.eon 8 138    87.4   8 133    90.7  
253.perlbmk base result bar (60.2)
253.perlbmk peak result bar (65.7)		 253.perlbmk 8 278    60.2   8 254    65.7  
254.gap base result bar (75.3)
254.gap peak result bar (74.5)		 254.gap 8 136    75.3   8 137    74.5  
255.vortex base result bar (125)
255.vortex peak result bar (135)		 255.vortex 8 142    125     8 131    135    
256.bzip2 base result bar (84.8)
256.bzip2 peak result bar (87.3)		 256.bzip2 8 164    84.8   8 159    87.3  
300.twolf base result bar (73.0)
300.twolf peak result bar (73.0)		 300.twolf 8 382    73.0   8 382    73.0  
  SPECint_rate_base2000 77.1    
  SPECint_rate2000 78.5  

Hardware
Hardware Vendor: IBM Corporation
Model Name: IBM System p5 550 (1900 MHz, 4 CPU)
CPU: POWER5+
CPU MHz: 1900
FPU: Integrated
CPU(s) enabled: 4 cores, 2 chips, 2 cores/chip (SMT on)
CPU(s) orderable: 2,4
Parallel: None
Primary Cache: 64KBI+32KBD (on chip)/core
Secondary Cache: 1920KB unified (on chip)/chip
L3 Cache: 36MB unified (off-chip)/DCM, 2 DCM/SUT
Other Cache: None
Memory: 16x2GB
Disk Subsystem: 2x36GB SCSI, 15K RPM
Other Hardware: None
Software
Operating System: AIX 5L V5.3
Compiler: XL C/C++ Enterprise Edition Version 8.0 for AIX
File System: AIX/JFS2
System State: Multi-user
Notes / Tuning Information 
  Portability Flags:
    176.gcc:      -ma -DHOST_WORDS_BIG_ENDIAN
    186.crafty:   -DAIX
    252.eon:      srcalt=fmax_errno
    253.perlbmk:  -DSPEC_CPU2000_AIX
    254.gap:      -DSYS_IS_BSD -DSYS_STRING_H
                  -DSYS_HAS_MALLOC_PROTO -DSYS_HAS_CALLOC_PROTO
    300.twolf:    -DHAVE_SIGNED_CHAR
 
  Base Optimization Flags:
    C:    -qpdf1/pdf2
          -O5 -blpdata -D_ILS_MACROS
    C++:  -qpdf1/pdf2
          -O5 -lhmu -qalign=natural
 
  Peak Optimization Flags
    164.gzip:     basepeak=1
    175.vpr:      -qpdf1/pdf2
                  -O5 -lhmu -blpdata -D_ILS_MACROS
    176.gcc:      -qpdf1/pdf2
                  -O5 -blpdata -qalign=natural -D_ILS_MACROS
    181.mcf:      -O5 -blpdata -qfdpr
                  fdpr -q -O3
    186.crafty:   basepeak=1
    197.parser:   -qpdf1/pdf2
                  -O5 -blpdata -D_ILS_MACROS
    252.eon:      -qpdf1/pdf2
                  -O4 -qarch=pwr4 -qtune=pwr4 -qalign=natural -D_ILS_MACROS
    253.perlbmk:  -qpdf1/pdf2
                  -O5 -lhmu -qalign=natural -blpdata -D_ILS_MACROS
    254.gap:      -qpdf1/pdf2
                  -O5 -qalign=natural -lhmu -blpdata -qfdpr -Q
    255.vortex:   -qpdf1/pdf2
                  -O5 -lhmu -blpdata
    256.bzip2:    -O5 -blpdata -qfdpr -D_ILS_MACROS
                  fdpr -q -O3
    300.twolf:    basepeak=1
 
 
  Approved alternate-source file 252.eon.fmax_errno.src.alt.tar.gz
  was used with 252.eon for POSIX-compatibility.

  The installed OS level is AIX 5L for POWER version 5.3 with the 5300-03 Recommended Maintenance package.

  SMT:  Acronym for "Simultaneous Multi-Threading". A processor technology that allows
        the simultaneous execution of multiple thread contexts within a single processor
        core. (Enabled by default)
  DCM:  Acronym for "Dual-Chip Module" (one dual-core processor chip + one L3-cache chip)
  SUT:  Acronym for "System Under Test"

  Extended C:     IBM XL C for AIX invoked as cc
  ANSI C89:       IBM XL C for AIX invoked as xlc
  C++:            IBM XL C for AIX invoked as xlC

  ulimits set to unlimited.
  Large page mode and memory affinity were set as follows:
      vmo -r -o lgpg_regions=800 -o lgpg_size=16777216
      chuser capabilities=CAP_BYPASS_RAC_VMM,CAP_PROPAGATE $USER
      reboot -q
      export MEMORY_AFFINITY=MCM

  The following config-file entry was used to assign each benchmark process to a core:
       submit = let "MYCPU=2*\$SPECUSERNUM"; if (("\$MYCPU > 7")) then let "MYCPU-=7"; fi; bindprocessor \$\$ \$MYCPU; $command
  The "bindprocessor" AIX command binds a process to a CPU core.

  Use flags-description file IBM-20050919-AIX.txt.

For questions about this result, please contact the tester.
For other inquiries, please contact [email protected]
Copyright © 1999-2005 Standard Performance Evaluation Corporation

First published at SPEC.org on 18-Oct-2005

Generated on Tue Oct 18 10:06:27 2005 by SPEC CPU2000 HTML formatter v1.01