SPEC Seal of Reviewal CINT2000 Result
Copyright © 1999-2005 Standard Performance Evaluation Corporation
ION
LN20J (3.6GHz Xeon processor w. 2MB L2 cache)
SPECint2000 = 1656     
SPECint_base2000 = 1656     
SPEC license # 2697 Tested by: ION Test date: Jul-2005 Hardware Avail: Apr-2005 Software Avail: May-2005
Benchmark Reference
Time		 Base
Runtime		 Base
Ratio		 Runtime Ratio Graph Scale
164.gzip 1400 117    1199      117    1199      164.gzip base result bar (1199)
164.gzip peak result bar (1199)
175.vpr 1400 124    1125      124    1125      175.vpr base result bar (1125)
175.vpr peak result bar (1125)
176.gcc 1100 59.7  1841      59.7  1841      176.gcc base result bar (1841)
176.gcc peak result bar (1841)
181.mcf 1800 111    1622      111    1622      181.mcf base result bar (1622)
181.mcf peak result bar (1622)
186.crafty 1000 61.4  1629      61.4  1629      186.crafty base result bar (1629)
186.crafty peak result bar (1629)
197.parser 1800 142    1269      142    1269      197.parser base result bar (1269)
197.parser peak result bar (1269)
252.eon 1300 58.2  2234      58.2  2234      252.eon base result bar (2234)
252.eon peak result bar (2234)
253.perlbmk 1800 85.1  2114      85.0  2118      253.perlbmk base result bar (2114)
253.perlbmk peak result bar (2118)
254.gap 1100 60.2  1826      60.2  1826      254.gap base result bar (1826)
254.gap peak result bar (1826)
255.vortex 1900 73.1  2601      73.1  2601      255.vortex base result bar (2601)
255.vortex peak result bar (2601)
256.bzip2 1500 111    1346      111    1346      256.bzip2 base result bar (1346)
256.bzip2 peak result bar (1346)
300.twolf 3000 178    1686      178    1686      300.twolf base result bar (1686)
300.twolf peak result bar (1686)
SPECint_base2000 1656       
  SPECint2000 1656       

Hardware
Hardware Vendor: ION
Model Name: LN20J (3.6GHz Xeon processor w. 2MB L2 cache)
CPU: Intel Xeon processor, 800MHz system bus
CPU MHz: 3591
FPU: Integrated
CPU(s) enabled: 2 cores, 2 chips, 1 core/chip (Hyper-Threading Technology disabled)
CPU(s) orderable: 1-2
Parallel: No
Primary Cache: 12K(I) micro-ops + 16KB(D) on chip
Secondary Cache: 2048KB (I+D) on chip
L3 Cache: None
Other Cache: None
Memory: 2 GB (4x512MB DDR2-400, 3-3-3 DIMMs)
Disk Subsystem: 80GB Seagate SATA disk
Other Hardware: None
Software
Operating System: Red Hat Enterprise Linux 4 ES, 2.6.9-5.0.5.ELsmp EM64T
Compiler: Intel(R) C Compiler for EM64T, V8.1 (Build 20050517)
Intel(R) C++ Compiler for EM64T, V8.1 (Build 20050517)
File System: ext3
System State: Multi-user, runlevel 3
Notes / Tuning Information 
Tested by ION Computer Systems
 Hyper-Threading Technology disabled in BIOS
 Hardware Prefetcher Enabled in BIOS
 Adjacent Cache Line Prefetch Enabled in BIOS
 System BIOS is V8.10 Build 81
 
 Feedback optimization:
      +FDO:  PASS1 = -prof_gen   PASS2 = -prof_use
 
 INT Portability Flags:
       176.gcc: -Dalloca=_alloca
       176.gcc: srcalt=64bitgcc35
    186.crafty: -DLINUX_i386
       252.eon: -DHAS_ERRLIST
       252.eon: srcalt=fmax_errno
   253.perlbmk: -DSPEC_CPU2000_LINUX_I386 -DSPEC_CPU2000_NEED_BOOL
                -DSPEC_CPU2000_GLIBC22 -DSPEC_CPU2000_LP64
       254.gap: -DSYS_IS_USG -DSYS_HAS_IOCTL_PROTO -DSYS_HAS_TIME_PROTO
                -DSYS_HAS_SIGNAL_PROTO -DSYS_HAS_ANSI -DSYS_HAS_CALLOC_PROTO
                -DSPEC_CPU2000_LP64
    255.vortex: -DSPEC_CPU2000_LP64
    255.vortex: srcalt=closed_files

 INT Baseline optimization flags:
    C programs: -fast -auto_ilp32 +FDO
  C++ programs: -fast -auto_ilp32 +FDO

 INT Peak optimization flags:
       164.gzip: basepeak=yes
        175.vpr: basepeak=yes
       176.gcc: basepeak=yes
        181.mcf: basepeak=yes
     186.crafty: basepeak=yes 
     197.parser: basepeak=yes
        252.eon: basepeak=yes
    253.perlbmk: -fast -Zp8 -auto_ilp32 +FDO
        254.gap: basepeak=yes
     255.vortex: basepeak=yes
      256.bzip2: basepeak=yes
      300.twolf: basepeak=yes

For questions about this result, please contact the tester.
For other inquiries, please contact [email protected]
Copyright © 1999-2005 Standard Performance Evaluation Corporation

First published at SPEC.org on 26-Jul-2005

Generated on Tue Jul 26 14:36:38 2005 by SPEC CPU2000 HTML formatter v1.01