SPEC Seal of Reviewal CINT2000 Result
Copyright © 1999-2005 Standard Performance Evaluation Corporation
IBM
2892-001 (2.0 GHz LV Xeon)
SPECint2000 = 766    
SPECint_base2000 = 756    
SPEC license # 11 Tested by: IBM, Rochester, MN Test date: Aug-2004 Hardware Avail: Oct-2004 Software Avail: Oct-2004
Benchmark Reference
Time		 Base
Runtime		 Base
Ratio		 Runtime Ratio Graph Scale
164.gzip 1400 171    817     170    824     164.gzip base result bar (817)
164.gzip peak result bar (824)
175.vpr 1400 306    458     306    458     175.vpr base result bar (458)
175.vpr peak result bar (458)
176.gcc 1100 116    946     117    942     176.gcc base result bar (946)
176.gcc peak result bar (942)
181.mcf 1800 374    481     375    480     181.mcf base result bar (481)
181.mcf peak result bar (480)
186.crafty 1000 136    738     136    737     186.crafty base result bar (738)
186.crafty peak result bar (737)
197.parser 1800 251    718     251    718     197.parser base result bar (718)
197.parser peak result bar (718)
252.eon 1300 125    1040      109    1189      252.eon base result bar (1040)
252.eon peak result bar (1189)
253.perlbmk 1800 211    852     211    853     253.perlbmk base result bar (852)
253.perlbmk peak result bar (853)
254.gap 1100 108    1017      108    1017      254.gap base result bar (1017)
254.gap peak result bar (1017)
255.vortex 1900 138    1377      138    1377      255.vortex base result bar (1377)
255.vortex peak result bar (1377)
256.bzip2 1500 259    578     255    589     256.bzip2 base result bar (578)
256.bzip2 peak result bar (589)
300.twolf 3000 559    537     559    537     300.twolf base result bar (537)
300.twolf peak result bar (537)
SPECint_base2000 756      
  SPECint2000 766      

Hardware
Hardware Vendor: IBM
Model Name: 2892-001 (2.0 GHz LV Xeon)
CPU: Intel LV Xeon
400/200 Mhz System/Memory buses
CPU MHz: 2000
FPU: Integrated
CPU(s) enabled: 1 core, 1 chip, 1 core/chip (HT technology enabled)
CPU(s) orderable: 1
Parallel: No
Primary Cache: 12K(I) micro-ops + 8KB(D) on chip
Secondary Cache: 512KB(I+D) on chip
L3 Cache: N/A
Other Cache: N/A
Memory: 2 x 512MB DDR200 Registered ECC
Disk Subsystem: 1 iSeries 2757-001 Disk IOA,
16 x 35.18GB 3516 15k RPM, unprotected.
Other Hardware: 2892 attached within
iSeries 9406-810, cpu 25F0-000
Software
Operating System: Windows Server 2003 Standard Edition Build 3790
Compiler: Intel C++ Compiler 8.0 (20031017Z)
Microsoft Visual Studio .NET (7.0.9466)
File System: NTFS
System State: Default
Notes / Tuning Information 
 PORTABILITY FLAGS
   176.gcc:     -Dalloca=_alloca /F10000000
   186.crafty:  -DNT_i386
   253.perlbmk: -DSPEC_CPU2000_NTOS -DPERLDLL /MT
   254.gap:     -DSYS_HAS_CALLOC_PROTO -DSYS_HAS_MALLOC_PROTO
 FEEDBACK DIRECTED OPTIMIZATION
   ONESTEP=yes
 BASE TUNING
   C:           -QxW -Qipo -O3 +FDO
   C++:         -QxW -Qipo -GX -GR
 PEAK TUNING
   164.gzip:    -QxW -Qipo -Oa -O3 +FDO
   175.vpr:     -QxW -Qipo     -O3 +FDO
   176.gcc:     -QxW -Qipo     -O3 +FDO
   181.mcf:     -QxW -Qipo     -O3 +FDO 
   186.crafty:  -QxW -Qipo     -O3 +FDO
   197.parser:  -QxW -Qipo     -O3 +FDO
   252.eon:     -QxW -Qipo     -O3 +FDO
   253.perlbmk: -QxW -Qipo     -O3 +FDO
   254.gap:     basepeak=yes
   255.vortex   basepeak=yes
   256.bzip2:   -Qipo -Oa -Qunroll1 +FDO
   300.twolf:   basepeak=yes
 EXTRA LIBRARIES
This system is a fully contained Intel based processor board. 
It supports all non-PCI devices directly on the board e.g
 memory, keyboard, mouse, display.
It attaches to the system as another PCI device.  The Windows
OS is provided PCI device drivers to allow the system to use
the PCI devices attached to the host iSeries system.  The host
OS then supports the use by Windows of the devices such as disks.

More information about the xSeries board in iSeries systems can
been found at http://www.ibm.com/servers/eserver/iseries/library
In particular, there is a Redbook available titled:
"Microsoft Windows Server 2003 Integration with iSeries"
that provides lots more detailed information.

For questions about this result, please contact the tester.
For other inquiries, please contact [email protected]
Copyright © 1999-2005 Standard Performance Evaluation Corporation

First published at SPEC.org on 12-Jul-2005

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